CDR Transceiver Clock Recovery Without a Crystal Oscillator
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Solution Overview
Problem
Conventional transceiver systems require a crystal oscillator to generate a reference clock, leading to complex and costly circuit designs, with limited flexibility in frequency usage due to strict frequency lock requirements, restricting the ability of clock/data recovery type receivers to accurately receive external signals.
Innovation Solution
A transceiver system with a phase and frequency detector that extracts a clock signal from an external signal to serve as a reference clock, using a clock/data recovery type receiver, dividing unit, and transmitter, which includes a comparing unit, phase detector, frequency detector, loop filter, digital-to-analog converter, voltage-controlled oscillator, and adjusting device to adjust frequency differences and lock the external signal's frequency and phase, simplifying circuit design and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a crystal oscillator is used to generate a reference clock, then the reference clock can be provided to the clock/data recovery type receiver and transmitter, but the circuit design becomes complex and manufacturing cost increases
Solution Approach 1:
The patent extracts the reference clock function from the external crystal oscillator and relocates it to the transmitter by generating a clock signal from the external data signal itself. This eliminates the need for a separate crystal oscillator in the transceiver system, simplifying the circuit design while maintaining reference clock functionality.
Solution Approach 2:
The patent makes the external data signal serve multiple functions: it is both the data to be transmitted and the source for generating the clock signal. This multi-functionality eliminates the need for separate clock generation components, reducing device complexity while maintaining reliable timing reference.
2Reliability
If a crystal oscillator is used to generate a reference clock, then the reference clock can be provided to the clock/data recovery type receiver and transmitter, but manufacturing cost increases
Solution Approach 1:
The patent removes the crystal oscillator component from the transceiver system by extracting its function and implementing it through signal processing of the external data signal. This component elimination directly reduces manufacturing cost while maintaining the necessary reference clock functionality.
Solution Approach 2:
The patent replaces the expensive crystal oscillator with a software-based or logic-circuit-based clock generation method that uses the existing external data signal. This substitution with a cheaper alternative achieves the same functional result without the high manufacturing cost of crystal oscillators.
3Reliability
If the clock/data recovery type receiver uses a crystal reference clock, then it can receive external signals, but the frequency lock requirement restricts the usage flexibility to a tight value of ±0.5%
Solution Approach 1:
The patent implements a dynamic frequency adjustment mechanism where the transmitter generates a clock signal from the external data signal and allows the receiver to adjust its operating frequency within a wider range. This dynamic adaptation enables frequency flexibility while maintaining reliable signal reception through continuous frequency synchronization.
Solution Approach 2:
The patent changes the frequency parameter relationship between transmitter and receiver by allowing the receiver to operate with a wider frequency range relative to the transmitter's generated clock signal. This parameter flexibility is achieved through the transmitter's ability to generate the clock signal and the receiver's frequency adjustment capability, expanding usage flexibility beyond the traditional ±0.5% constraint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies circuit design, reduces manufacturing costs, and enhances the flexibility of the transceiver system by allowing the clock/data recovery type receiver to adjust the frequency difference between voltage-controlled oscillation signals and the external signal to an operable range, improving the system's ability to accurately receive and transmit data.
Implementation Method 1
a phase detector for detecting a phase difference between the voltage-controlled oscillation signals and the sampling signal to generate phase difference signals
Implementation Method 2
a frequency detector for detecting a frequency of the phase difference signals to generate frequency difference signals
Implementation Method 3
a voltage-controlled oscillator for generating voltage-controlled oscillation signals in response to a control voltage
Implementation Method 4
a loop filter for filtering the phase difference signals to generate a filtered control voltage
Data Source
AI summary
A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter. The clock and data recovery type receiver receives an external signal from a host unit and extracts the external signal to generate a clock signal and a data signal. The frequency divider is used to divide the frequency of the clock signal for generating a reference clock signal. The transmitter transmits output data content based on the reference clock signal.