CDS Circuit Layout Without Capacitor Polarity Inversion

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Solution Overview

Problem

Conventional CMOS image sensors face challenges in reducing noise, particularly thermal noise and charge injection noise, due to the requirements of polarity inversion in sampling capacitors, which limits the effectiveness of noise reduction and image quality.

Innovation Solution

A correlation double sampling circuit that eliminates the need for polarity inversion in sampling capacitors, allowing the use of MOSFET capacitors with higher capacitance per unit area and reduces the number of transistor switches, thereby minimizing thermal and charge injection noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If polarity inversion is performed in sampling capacitors, then the circuit can operate with conventional design, but thermal noise and charge injection noise increase

Engineering Contradiction:
Improvethermal noise and charge injection noiseVSAvoidcircuit structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the polarity inversion operation from the sampling capacitor circuit. By removing this operation, the circuit avoids generating charge injection noise and reduces thermal noise, while also simplifying the overall circuit structure by eliminating associated switching components.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of inverting the polarity of sampling capacitors as in conventional designs, this patent maintains consistent polarity throughout the sampling process. This inverted approach (avoiding polarity inversion when convention requires it) eliminates the associated noise generation mechanisms while preserving the correlation double sampling functionality.

Inventive Principle:
Principle #13The other way round (Inversion)

2Area of stationary object

If MOSFET capacitors are used with higher capacitance per unit area, then chip size can be reduced, but noise reduction effectiveness is limited by conventional polarity inversion requirements

Engineering Contradiction:
Improvechip sizeVSAvoidnoise
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent removes the polarity inversion operation that limits the effectiveness of MOSFET capacitors. This extraction allows MOSFET capacitors to fully utilize their higher capacitance per unit area property for noise reduction without being counteracted by the noise-generating polarity inversion process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operational parameters of the sampling capacitors by eliminating polarity inversion. This parameter change enables MOSFET capacitors to operate in their optimal regime, maximizing their capacitance density advantage for reducing chip size while simultaneously achieving effective noise reduction.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the number of transistor switches is reduced, then circuit complexity and noise are reduced, but the ability to perform polarity inversion is lost

Engineering Contradiction:
Improvenumber of transistor switchesVSAvoidpolarity inversion capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent extracts and removes the polarity inversion functionality from the circuit operation. This elimination reduces the number of transistor switches required while maintaining the essential correlation double sampling capability, thereby simplifying the circuit without sacrificing core functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly reduces thermal and charge injection noise, enhancing image quality and potentially reducing chip size while maintaining capacitance values, resulting in a simplified and more effective noise reduction mechanism.

Implementation Method 1

The photodiode PD is utilized for sensing incident light and accumulating photo charges that are generated due to the incident light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

a first sampling capacitor having a first terminal and a second terminal, the second terminal being coupled to a reference voltage terminal; a second sampling capacitor having a first terminal and a second terminal, the second terminal being coupled to a reference voltage terminal

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8125550B2Correlation double sampling circuit for image sensor
Publication Date: 2012.02.28 PIXART IMAGING INC
  • US8125550B2 patent drawing
  • US8125550B2 patent drawing
  • US8125550B2 patent drawing

AI summary

A correlation double sampling (CDS) circuit for sampling a reset signal and a light-sensing signal outputted from a pixel column of an image sensor includes two sampling capacitors and four transistor switches. The operation of the CDS circuit needs not change polarities of the two sampling capacitors, such that MOS capacitors that have higher capacitance per unit area can be utilized for realizing the two sampling capacitors for reducing thermal noises induced when performing sampling. Additionally, fewer transistors are used in the CDS circuit, and thus charge injection noises caused by switching the transistor switches can also be reduced.