Correlated Double Sampling Pixel for Noise Reduction
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Solution Overview
Problem
Image sensors face limitations in dynamic range due to reset sampling noise, which affects the detection of electromagnetic radiation variations.
Innovation Solution
A correlated double sampling pixel design that includes a sensor circuit, a sample and hold stage with capacitor-elements, and a calibration switching-element to sample and subtract reset voltage values, reducing noise and improving dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If reset sampling noise is reduced through conventional methods, then dynamic range is improved, but device complexity increases
Solution Approach 1:
The patent combines the reset sampling and signal sampling operations into a single correlated double sampling process. The first capacitor-element stores the reset voltage sample, while the second capacitor-element stores the signal voltage sample, and both are processed together in the same readout circuitry. This merging of operations reduces the need for separate complex noise reduction circuits while achieving superior dynamic range through the correlation subtraction process.
Solution Approach 2:
The patent performs preliminary sampling of the reset voltage onto the first capacitor-element before the signal integration period begins. This preliminary action captures the reset noise characteristics early, allowing them to be correlated and subtracted from the subsequent signal sample. By performing this action in advance, the system prepares the noise reference without adding complexity to the main signal path.
2Measurement precision
If correlated double sampling is implemented to reduce reset noise, then signal-to-noise ratio is improved, but device complexity increases
Solution Approach 1:
The sample switching-element serves multiple functions: it controls the sampling of reset voltage onto the first capacitor, controls the sampling of signal voltage onto the second capacitor, and enables the correlated subtraction process. This multi-functionality reduces the need for separate dedicated circuits for each operation, thereby improving signal-to-noise ratio through CDS without proportionally increasing device complexity.
Solution Approach 2:
The patent utilizes parameter changes in the capacitor elements' charging states to achieve noise reduction. The first capacitor is charged to the reset voltage level, then the second capacitor is charged to the signal voltage level, and their difference is computed. By manipulating voltage parameters and timing sequences rather than adding complex circuitry, the system achieves superior signal-to-noise ratio with controlled complexity.
3Measurement precision
If photodetector voltage swing is increased to improve dynamic range, then smallest detectable variation is improved, but reset sampling noise increases
Solution Approach 1:
The patent implements a feedback mechanism where the reset voltage sample stored on the first capacitor is subtracted from the signal voltage sample on the second capacitor. This feedback loop uses the captured reset noise characteristics to actively cancel out the corresponding noise components in the signal path, allowing the system to maintain large photodetector voltage swings for improved dynamic range while eliminating the associated reset sampling noise through the correlation subtraction process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces reset sampling noise, enhancing the dynamic range and fill factor of image sensors while maintaining readout speed, leading to improved signal-to-noise ratio and efficiency.
Implementation Method 1
a sensor circuit to generate a voltage value corresponding to electromagnetic radiation received on a photodetector included therein
Implementation Method 2
The first capacitor-element is coupled between an output of the sensor circuit through the sample switching-element and a predetermined reference potential
Implementation Method 3
The second capacitor-element has a first node coupled to the output of the sensor circuit through the sample switching-element and a second node coupled in series with an output of the S/H stage
Data Source
AI summary
A correlated double sampling (CDS) pixel and methods of operating the same are provided. The CDS pixel includes a sensor circuit to generate a voltage value corresponding to electromagnetic radiation received on a photodetector included therein, and a sample and hold (S/H) stage including a sample switching-element and first and second capacitor-elements. The first capacitor-element is coupled between an output of the sensor circuit through the sample switching-element and a predetermined reference potential. The second capacitor-element has a first node coupled to the output of the sensor circuit through the sample switching-element and a second node coupled in series with an output of the S/H stage, the second node of the second capacitor-element further coupled through a calibration switching-element to a calibration voltage to sample a reset voltage value on the photodetector at a first time at a beginning of an integration period following reset of the sensor circuit.