Correlated Double Sampling Circuit with Switchable Capacitor Banks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional correlated double sampling (CDS) circuits in image sensors face limitations in input range, which affects the quality of images captured by restricting the operation of comparators and leading to decreased signal-to-noise ratio (SNR) when dealing with high analog gain settings.

Innovation Solution

A CDS circuit that employs capacitive dividing to compress pixel and ramp signals, using a signal compressor and comparator to bring these signals within the comparator's input range, and an optional boosting circuit to enhance the initial direct current voltage of these signals for improved comparison.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional CDS circuits are used with fixed input range, then the circuit structure is simple, but the input range is limited and SNR decreases at high analog gain settings

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The input range extension is achieved by segmenting the capacitor network into multiple switchable capacitor banks. Each bank can be independently connected or disconnected from the signal path, allowing the total capacitance to be divided into different effective values. This segmentation enables the circuit to handle multiple input signal ranges without requiring a completely different circuit design for each range.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The capacitor network is made dynamic through switchable connections that allow real-time reconfiguration of the capacitance value. By controlling the switches, the effective capacitance can be changed during operation to match different input signal conditions. This dynamic adjustment maintains optimal SNR across varying signal levels and analog gain settings without sacrificing circuit simplicity.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the input range is extended using switchable capacitor banks, then the input range and SNR are improved, but the circuit complexity increases

Engineering Contradiction:
Improveinput rangeVSAvoidcircuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The switchable capacitor bank network serves multiple functions simultaneously: it extends the input range, maintains optimal SNR at different gain settings, and provides adaptability to various signal conditions. By using the same capacitor components with different switching configurations, the circuit achieves versatility without proportionally increasing complexity. The same hardware structure handles multiple operating modes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The circuit changes its electrical parameters (capacitance values) by reconfiguring the switchable capacitor banks. Different combinations of capacitors are connected in series or parallel to achieve different effective capacitance values. This parameter change allows the circuit to adapt to different input ranges and gain settings, providing extended versatility while using a unified circuit architecture.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If capacitor banks are connected in series, then the input range is extended, but the handling capability for small signals may be reduced

Engineering Contradiction:
Improveinput rangeVSAvoidsmall signal handling
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The circuit dynamically switches between series and parallel capacitor configurations based on the input signal conditions. For large signals, capacitor banks are connected in series to extend the input range. For small signals, the configuration switches to parallel connections to maintain high sensitivity and proper handling capability. This dynamic reconfiguration ensures optimal performance across the entire signal spectrum.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The switching between different capacitor configurations occurs periodically or in response to signal level detection. The control logic monitors the input signal amplitude and periodically reconfigures the capacitor banks accordingly. This periodic action ensures that the circuit maintains the appropriate capacitance configuration for the current signal level, preserving both input range extension and small signal handling capability.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution allows for a wider input range, preventing a decrease in signal-to-noise ratio (SNR) even at high analog gain settings, thereby enhancing image quality by ensuring the compressed signals can be accurately compared, thus overcoming the limitations of conventional CDS circuits.

Implementation Method 1

compressing, by a signal compressor, each of a pixel signal and a ramp signal using capacitive dividing

Methodology Applied
Scientific EffectCapacitive dividing: Capacitance

Implementation Method 2

boosting an initial direct current voltage of a pixel signal and an initial direct current voltage of a ramp signal

Methodology Applied
Scientific EffectVoltage boosting:

Data Source

PatentUS9055250B2Correlated double sampling circuit, method thereof and devices having the same
Publication Date: 2015.06.09 SAMSUNG ELECTRONICS CO LTD
  • US9055250B2 patent drawing
  • US9055250B2 patent drawing
  • US9055250B2 patent drawing

AI summary

A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.