Cell Instance Charge Model for Back-Miller Effect Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current circuit design methods face challenges in accurately calculating time delays due to the back-Miller effect, which is not adequately addressed by existing static timing analysis (STA) techniques, leading to inaccuracies in predicting charge at the input of a cell instance for arbitrary input voltage waveforms.

Innovation Solution

A charge model is developed for a cell instance, based on delay models from library data, using equations that relate charge at the input to input and output voltages, which accounts for back-Miller capacitance and Miller current, allowing for more accurate time delay calculations by predicting charge at the input of a cell instance for arbitrary input voltage waveforms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If static timing analysis (STA) techniques are used to calculate time delays, then the timing analysis can be performed independently of circuit inputs, but the back-Miller effect is not adequately addressed leading to inaccurate charge prediction

Engineering Contradiction:
Improvetiming analysis efficiencyVSAvoidcharge prediction accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent transforms the charge prediction problem by changing the functional form of the model from traditional capacitance-based calculations to a polynomial-based charge model. The charge is expressed as a polynomial function of input and output voltages (Q = a0 + a1*Vin + a2*Vout + a3*Vin^2 + a4*Vin*Vout + a5*Vout^2), allowing the model to capture nonlinear effects including the back-Miller effect through fitted coefficients rather than requiring explicit effect modeling.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If traditional delay models are used, then the calculation process is simpler, but the precision of time delay calculation deteriorates due to inadequate handling of back-Miller effect

Engineering Contradiction:
Improvemodel complexityVSAvoidtime delay calculation precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent creates a simplified polynomial representation that copies the essential behavior of the complex back-Miller effect without requiring explicit modeling of the effect mechanisms. By fitting polynomial coefficients to simulation or measurement data, the model reproduces the charge-voltage relationships including back-Miller effects in a computationally efficient manner.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11775719B1Cell instance charge model for delay calculation
Publication Date: 2023.10.03 CADENCE DESIGN SYST INC
  • US11775719B1 patent drawing
  • US11775719B1 patent drawing
  • US11775719B1 patent drawing

AI summary

Various embodiments provide a charge model for a cell instance for delay calculation of a circuit design that includes the cell instance, where the charge model can be part of electronic design automation (EDA) and used in timing analysis of a circuit design that includes the cell instance. The charge model generated by an embodiment can predict a charge at an input of a cell instance for an arbitrary input voltage waveform and can address (e.g., reduce or negate) a time delay impact the Miller effect has on the cell instance.