Multi-Level Cell Plug Contacts for Reliable 3D Memory Stacks

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Solution Overview

Problem

The operational reliability of three-dimensional semiconductor memory devices deteriorates as the number of stacked memory cells increases, leading to challenges in manufacturing efficiency and cost.

Innovation Solution

A semiconductor device design featuring a stacked body with insulating and conductive layers, a cell plug, and a connection contact structure with specific geometric configurations to minimize manufacturing time and cost, including a method of forming first and second connection contacts at different levels to optimize the structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of stacked memory cells is increased to improve integration degree, then the area occupied by memory cells per unit area is reduced, but the operational reliability of the three-dimensional semiconductor memory device deteriorates

Engineering Contradiction:
Improvenumber of stacked memory cellsVSAvoidoperational reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The connection contact structure is divided into multiple separate connection contacts (first connection contact, second connection contact, third connection contact) at different levels. This segmentation allows each contact to be independently formed and optimized, reducing the risk of defects propagating through the entire structure while maintaining electrical connectivity to all stacked memory cells.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimensionality aspect by forming connection contacts at different levels (first level, second level, third level) corresponding to different portions of the cell plug. This multi-level arrangement in the vertical dimension enables reliable electrical connection to numerous stacked memory cells without requiring excessive lateral area, thus maintaining high integration while improving reliability through distributed contact points.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the number of stacked memory cells is increased to improve integration degree, then manufacturing efficiency and cost are adversely affected

Engineering Contradiction:
Improvenumber of stacked memory cellsVSAvoidmanufacturing efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The connection contacts are formed in advance during the manufacturing process at different levels before final device completion. The first connection contact is formed at a first level, then the second connection contact at a second level, and the third connection contact at a third level. This preliminary formation of multiple connection contacts simplifies subsequent manufacturing steps and enables parallel processing, thereby improving manufacturing efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The manufacturing process is segmented into distinct steps for forming each connection contact at different levels. This segmentation allows each connection contact to be formed using optimized process parameters specific to its level, improving overall manufacturing efficiency by avoiding the need to rework entire structures and enabling better process control and yield management.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240276731A1Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2024.08.15 SK HYNIX INC
  • US20240276731A1 patent drawing
  • US20240276731A1 patent drawing
  • US20240276731A1 patent drawing

AI summary

A semiconductor device includes a stacked body including stacked insulating layers and stacked conductive layers; a cell plug; a connection contact structure; and a source layer coupled to the cell plug. The cell plug includes upper and lower portions, the connection contact structure includes a first connection contact disposed at substantially the same level as the lower portion of the cell plug, and a second connection contact disposed at substantially the same level as the upper portion thereof, a level at which the first and second connection contacts contact each other is substantially the same as a level at which the upper and lower portions of the cell plug contact each other, and a level of an uppermost portion of the second connection contact is higher than a level of a bottom surface of the source layer, and is lower than a level of a top surface thereof.