Central Terminal Arrangement for Multi-Die Wirebond Stub Minimization

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Solution Overview

Problem

Conventional microelectronic packages face challenges in minimizing signal propagation delay and skew, particularly in multi-chip packages, which can impact circuit performance due to varying signal path lengths and terminal arrangements, leading to issues like settling time, ringing, and intersymbol interference.

Innovation Solution

The microelectronic package design features a substrate with apertures and terminals arranged to reduce stub lengths between microelectronic elements, with terminals configured to carry address and command signals in a central region, reducing the number of routing layers and electrical connections, and utilizing a dielectric element with a low coefficient of thermal expansion to minimize thermal expansion effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If terminals are arranged in conventional peripheral positions, then routing flexibility is improved, but signal propagation delay and skew increase

Engineering Contradiction:

Improverouting complexityVSAvoidsignal propagation delay

Core Design Contradiction:

Device complexityVSLoss of time

Solution Approach 1:

The patent moves terminals from the conventional peripheral arrangement (2D edge positioning) to a central region arrangement on the substrate surface. This dimensional repositioning allows signal paths to originate from the center rather than edges, reducing the distance signals must travel to reach microelectronic elements and thereby reducing propagation delay and skew while maintaining routing flexibility.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If stub lengths are increased to accommodate more terminals, then connection capacity is improved, but signal quality deteriorates

Engineering Contradiction:

Improvenumber of connectionsVSAvoidsignal quality

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the spatial parameter of terminal positioning from peripheral to central region, which fundamentally alters the stub length characteristics. By positioning terminals centrally, the effective stub lengths to all microelectronic elements are reduced and equalized, allowing for increased connection capacity without compromising signal quality, as the maximum stub length is minimized.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If multiple routing layers are used to connect terminals, then connection flexibility is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveconnection flexibilityVSAvoidmanufacturing complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the terminal arrangement from the conventional peripheral substrate edge and repositions it to a central region. This extraction and relocation simplifies the routing architecture by reducing the need for multiple complex routing layers, as central positioning provides more direct access to microelectronic elements, thereby maintaining connection flexibility while reducing manufacturing complexity.

Inventive Principle:

Principle #2Taking out (Extraction)

4Area of stationary object

If package size is reduced for compact devices, then portability is improved, but thermal expansion effects worsen

Engineering Contradiction:

Improvepackage areaVSAvoidthermal expansion effects

Core Design Contradiction:

Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter by selecting a substrate with a low coefficient of thermal expansion (CTE). This material parameter change allows the package to maintain dimensional stability and minimize thermal expansion effects even when the package area is reduced for compact portable devices, thus resolving the contradiction between compactness and thermal stability.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves electrical performance by reducing signal propagation delays and skew, enhancing settling time and reducing manufacturing complexity and cost, while maintaining high performance in compact portable devices and data servers.

Implementation Method 1

utilizing a dielectric element with a low coefficient of thermal expansion to minimize thermal expansion effects

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8441111B2Stub minimization for multi-die wirebond assemblies with parallel windows

Publication Date: 2013.05.14 ADEIA SEMICON TECH LLC

AI summary

A microelectronic package can include a substrate having first and second opposed surfaces and first and second apertures extending between the first and second surfaces, first and second microelectronic elements each having a surface facing the first surface of the substrate, a plurality of terminals exposed at the second surface in a central region thereof, and leads electrically connected between contacts of each microelectronic element and the terminals. The apertures can have first and second parallel axes extending in directions of the lengths of the respective apertures. The central region of the second surface can be disposed between the first and second axes. The terminals can be configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic elements.