Centralized CCR Resolution for Conditional Instruction Coherency

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Solution Overview

Problem

In processor systems, conditional instructions can be executed out of order, leading to inaccuracies in conditional code register flags, which compromise the integrity of software programs due to the speed differences between execution units and the uncertainty of conditional branch outcomes.

Innovation Solution

Centralizing the reading and writing of condition code register (CCR) operations within a single execution unit, specifically in the latest stage of the pipeline, ensures data coherency by synchronizing CCR operations across all execution units, allowing for accurate evaluation and execution of conditional instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple execution units process conditional instructions in parallel, then processing speed is improved, but data coherency and execution order accuracy deteriorate

Engineering Contradiction:
Improveprocessing speedVSAvoiddata coherency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A centralized condition code register (CCR) acts as an intermediary between multiple execution units. The CCR is the sole authority for reading and writing condition codes, mediating all conditional instruction operations. This ensures that even when execution units operate in parallel, they all reference the same condition code state, maintaining data coherency and correct execution order semantics.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent merges the condition code reading and writing functions into a single centralized location (the CCR) rather than allowing each execution unit to have its own condition code state. This consolidation ensures that all execution units operate on a unified condition code basis, resolving the contradiction between parallel processing and data coherency.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If conditional instructions are executed out of order due to execution unit speed differences, then processing efficiency is improved, but program integrity deteriorates

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidprogram integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The CCR serves as an intermediary that decouples the physical execution order from the logical condition code state. Execution units can complete operations in any order, but all condition code reads and writes go through the centralized CCR, which maintains the authoritative state. This allows out-of-order execution while preserving program integrity through the mediator.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a model where execution units may have local copies or views of the condition code state for immediate use, but the master copy resides in the centralized CCR. This copying approach allows fast local access while ensuring eventual consistency with the authoritative state, enabling efficient out-of-order execution without compromising program integrity.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP1762929B1Centralized resolution of conditional instructions
Publication Date: 2011.01.12 TEXAS INSTRUMENTS INC
  • EP1762929B1 patent drawingFigure 1
  • EP1762929B1 patent drawingFigure 2
  • EP1762929B1 patent drawingFigure 3

AI summary

A processor (500) that includes a memory (524) comprising a condition code register (CCR) (528) and a plurality of execution units (510, 512) coupled to the memory. The execution units comprise multiple stages (522a - 522c) and each execution unit is provided with a different instruction predicated on a conditional statement. The conditional statement of each different instruction also is provided to a single execution unit. The single execution unit 510 compares the conditional statement of each different instruction to the CCR in a single stage (522b) of the single execution unit.