Centralized Controller for Multiprocessor Cache Coherence

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Solution Overview

Problem

Dynamic scaling in multiprocessor systems complicates cache coherence due to changing numbers of coherent controllers, leading to increased snoop and acknowledgment messages, necessitating constant power for some controllers to respond, which affects power management and consumption.

Innovation Solution

A centralized controller manages power states of processors and cache controllers, broadcasting snoop messages only to powered-on states and implying acknowledgment messages for powered-off states, reducing unnecessary message transmission and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If snoop messages are broadcast to all controllers in a multiprocessor system, then cache coherence is maintained, but power consumption increases because at least a portion of a controller must be powered-up at all times to respond to snoop messages

Engineering Contradiction:
Improvecache coherenceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary actions by having controllers register their presence and power state with a centralized controller before needing to respond to snoop messages. The centralized controller maintains an updated list of powered-on controllers, so when a snoop message needs to be sent, it already knows which controllers are available to receive and respond to the message, eliminating the need for broadcast to all controllers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Controllers provide feedback to the centralized controller about their power state through registration and status updates. The centralized controller uses this feedback information to dynamically determine which controllers should receive snoop messages, adjusting the messaging strategy based on the current power state of controllers in the system.

Inventive Principle:
Principle #23Feedback

2Productivity

If dynamic scaling is implemented in a multiprocessor system, then power requirements and performance requirements are optimized, but cache coherence becomes difficult to maintain because the number of coherent controllers changes over time

Engineering Contradiction:
Improveperformance optimizationVSAvoidcache coherence management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

A centralized controller is introduced as an intermediary between multiple cache controllers. This intermediary maintains the authoritative list of powered-on controllers and manages the distribution of snoop messages. When controllers are powered on or off during dynamic scaling, the centralized controller updates its registry and adjusts messaging accordingly, shielding individual controllers from the complexity of tracking system-wide power states.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes the parameter of message routing based on the power state parameter of controllers. When a controller transitions from powered-off to powered-on (or vice versa), the system parameter changes from excluding that controller from snoop messages to including it, automatically adjusting cache coherence messaging to match the current configuration without requiring complex coordination protocols.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the number of snoop messages and acknowledgment messages is increased to maintain cache coherence with dynamic scaling, then cache coherence is maintained, but power consumption increases and message transmission overhead increases

Engineering Contradiction:
Improvecache coherenceVSAvoidmessage transmission energy
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

Instead of broadcasting snoop messages to all controllers (excessive action), the system sends messages only to the subset of controllers that are currently powered-on and capable of responding (partial action). This reduces the number of message transmissions and associated energy consumption while still maintaining cache coherence among the active controllers.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9213643B2Broadcast messaging and acknowledgment messaging for power management in a multiprocessor system
Publication Date: 2015.12.15 AMPERE COMPUTING LLC
  • US9213643B2 patent drawing
  • US9213643B2 patent drawing
  • US9213643B2 patent drawing

AI summary

Various aspects provide for implementing a cache coherence protocol. A system comprises at least one processing component and a centralized controller. The at least one processing component comprises a cache controller. The cache controller is configured to manage a cache memory associated with a processor. The centralized controller is configured to communicate with the cache controller based on a power state of the processor.