Centralized Memory Power Management via Subsystem Controller

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Solution Overview

Problem

Decentralized power management in memory subsystems leads to increased complexity, cost, and inefficiency due to the need for communication between memory devices and the inability to access global information, resulting in suboptimal power management and performance.

Innovation Solution

Centralizing power management decisions within a controller of the memory subsystem, eliminating the need for device-to-device communication and allowing for more flexible and efficient power management based on workload and other factors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If decentralized power management is implemented in memory devices, then each device can independently manage its own power, but the system complexity increases due to the need for communication mechanisms between devices

Engineering Contradiction:
Improveindependent power management capabilityVSAvoidcommunication mechanism complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent consolidates power management functionality from individual memory devices into a centralized memory subsystem controller. The controller receives power management commands from the host and distributes power management signals to multiple memory devices, eliminating the need for complex inter-device communication mechanisms while maintaining independent power management capability at the subsystem level.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If decentralized power management is implemented, then devices can negotiate power modes, but negotiation delays reduce system performance

Engineering Contradiction:
Improvepower mode negotiation capabilityVSAvoidsystem performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The memory subsystem controller pre-establishes power management policies and configurations based on host requirements and system conditions. When power management is needed, the controller directly applies pre-determined power modes to memory devices without requiring real-time negotiation, thereby eliminating negotiation delays while maintaining adaptability through policy-based control.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If decentralized power management is used, then devices can manage power locally, but global information is inaccessible leading to suboptimal decisions

Engineering Contradiction:
Improvelocal power management autonomyVSAvoidglobal information accessibility
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The memory subsystem controller serves as an intermediary between the host system and memory devices. It collects global information including host power policies, aggregate memory utilization, and quality-of-service requirements, then uses this comprehensive information to make optimal power management decisions that are distributed to individual devices. This maintains local autonomy while incorporating global awareness.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Adaptability or versatility

If memory devices communicate to manage power, then decentralized control is achieved, but additional cost is incurred for communication infrastructure

Engineering Contradiction:
Improvedecentralized control capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent extracts the power management communication functionality from the memory devices themselves and relocates it to the memory subsystem controller. The controller handles all power management command reception, processing, and signal distribution, eliminating the need for additional communication infrastructure between memory devices while maintaining decentralized control capability through the controller's coordination of individual device power states.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11847327B2Centralized power management in memory devices
Publication Date: 2023.12.19 MICRON TECHNOLOGY INC
  • US11847327B2 patent drawing
  • US11847327B2 patent drawing
  • US11847327B2 patent drawing

AI summary

A total power requirement for a plurality of memory operations is estimated. It is determined that the total power requirement would meet a power budget. In response to determining that the total power requirement would meet the power budget, a power profile identifier associated with a first operation of the plurality of memory operations is adjusted. The first operation and the power profile identifier are issued to a memory device. The power profile identifier is used by the memory device to regulate an amount of power used when performing the first operation.