CEP Thread Affinity Analyzer for NUMA Memory Optimization
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Solution Overview
Problem
Existing complex event processing (CEP) systems face performance issues on multicore machines with non-uniform memory access (NUMA) architecture, as existing scheduling policies do not effectively manage memory access and thread allocation across multiple CPUs.
Innovation Solution
The proposed solution involves an affinity analyzer that allocates tightly interacting threads within a single NUMA node, determining thread nearness and processing capacity to minimize memory access overhead, and dynamically adjusts thread grouping based on runtime information to balance CPU usage across nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If existing CEP scheduling policies are used on multicore machines with NUMA architecture, then system complexity is reduced and ease of operation is maintained, but memory access time increases and processing performance deteriorates
Solution Approach 1:
The affinity analyzer pre-determines thread nearness and CPU affinity requirements before thread execution begins. By analyzing thread interaction patterns in advance and pre-assigning threads to appropriate NUMA nodes based on their affinity requirements, the system eliminates runtime memory access delays without requiring complex dynamic scheduling policies during execution.
Solution Approach 2:
The system creates an affinity map that copies and stores thread-CPU affinity relationships determined by the affinity analyzer. This affinity map serves as a lookup table that guides thread placement on NUMA nodes, replacing the need for complex real-time scheduling decisions while maintaining optimal memory access patterns.
2Productivity
If threads are distributed across multiple NUMA nodes for load balancing, then CPU utilization is improved, but memory access time increases due to non-local memory access
Solution Approach 1:
The system applies local quality by assigning threads to specific NUMA nodes based on their affinity characteristics. Threads that require frequent access to local memory are placed on NUMA nodes with fast memory access, while threads with different affinity requirements are placed on appropriate nodes. This localized assignment optimizes memory access speed for each thread group without sacrificing overall CPU utilization.
Solution Approach 2:
The affinity analyzer performs preliminary analysis to determine which threads have high affinity for specific NUMA nodes before execution. This pre-determination allows the system to proactively place threads on optimal NUMA nodes, ensuring both high CPU utilization and minimized memory access times from the start of execution.
3Speed
If thread affinity is strictly enforced on single NUMA nodes, then memory access time is reduced, but load distribution across CPUs becomes unbalanced
Solution Approach 1:
The system dynamically adjusts thread affinity assignments based on runtime conditions. The affinity analyzer monitors thread execution patterns and can reassign threads to different NUMA nodes when load imbalance is detected. This dynamic approach maintains the benefit of localized memory access while adapting to changing workload conditions to preserve balanced load distribution across CPUs.
Solution Approach 2:
The system changes the affinity parameter assignments based on system state. When a NUMA node becomes overloaded, the affinity analyzer modifies the affinity parameters of affected threads and relocates them to underutilized nodes. This parameter adjustment maintains optimal memory access patterns while restoring load balance across the system.
Data Source
AI summary
In an example embodiment performance is optimized in a complex event stream (CEP) system. Information about a plurality of CEP threads is obtained. Then nearness among the plurality of CEP threads is determined, wherein nearness between a first and a second CEP thread indicates how much interaction is expected to occur between the first and second CEP thread. Based on the determined nearness, the plurality of CEP threads are organized into a plurality of CEP thread groups. Then, each of the plurality of CEP thread groups are assigned to a different processing node, with each processing node having one or more processors and a memory.