Multilayer Ceramic Condenser Edge Durability via Localized Slurry Control

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Solution Overview

Problem

Existing multilayer ceramic condensers face challenges in miniaturization and high integration due to issues with the thickness and durability of the edge portions, which affect the reliability and capacity of the devices.

Innovation Solution

A method for manufacturing multilayer ceramic condensers involves forming side portions on the dielectric layers using a slurry application process, with controlled thicknesses of 10 μm to 30 μm for the side portions and 2 μm or more for the edge portions, and using ultraviolet adhesive films to manage the slurry application, ensuring the edge portions are adequately protected and the cover layers remain thin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the dielectric layers are thinned and stacking amount is increased to implement high-capacity and small-sized multilayer ceramic condenser, then the capacity and miniaturization are improved, but the edge portion thickness becomes excessively thick at unwanted portions and durability is compromised

Engineering Contradiction:
ImprovecapacityVSAvoidedge portion thickness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies different thickness requirements to different regions of the dielectric layers. The edge portions are maintained with a thickness of 2 μm or more to prevent cracking and ensure durability, while the central portions can be thinner to enable higher stacking density and capacity. This local differentiation of thickness requirements resolves the contradiction between miniaturization and edge durability.

Inventive Principle:
Principle #3Local quality

2Reliability

If the edge portion thickness is increased to secure durability and prevent cracking, then the reliability is improved, but the cover layer thickness becomes excessively thick and miniaturization is hindered

Engineering Contradiction:
ImprovedurabilityVSAvoidcover layer thickness
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The invention implements local quality by specifying that only the edge portions of the dielectric layers should have a thickness of 2 μm or more, while the cover layers can be kept thin (10 μm or less). This localized thickening at the edges provides the necessary durability without increasing the overall volume of the condenser, thus resolving the contradiction between reliability and miniaturization.

Inventive Principle:
Principle #3Local quality

3Reliability

If slurry is applied to form side portions on dielectric layers, then the durability of chips is improved, but the thickness control becomes difficult and manufacturing precision is reduced

Engineering Contradiction:
Improvechip durabilityVSAvoidthickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies precise parameter ranges for the slurry application process: the side portions should have a maximum thickness of 10-30 μm, and the edge portions should maintain a minimum thickness of 2 μm. By defining these specific parameter ranges, the invention achieves both improved chip durability through slurry application and maintained manufacturing precision through controlled thickness specifications.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9679697B2Method for manufacturing multilayer ceramic condenser
Publication Date: 2017.06.13 SAMSUNG ELECTRO MECHANICS CO LTD
  • US9679697B2 patent drawing
  • US9679697B2 patent drawing
  • US9679697B2 patent drawing

AI summary

Disclosed are a multilayer ceramic condenser and a method for manufacturing the same. There is provided a multilayer ceramic condenser including: a multilayer main body in which a plurality of dielectric layers including a first side, a second side, a third side, and a fourth side are stacked; a first cover layer and a second cover layer forming the plurality of dielectric layers; a first dielectric layer disposed between the first cover layer and the second cover layer and printed with a first inner electrode pattern drawn to the first side; a second dielectric layer alternately stacked with the first dielectric layer and printed with a second inner electrode pattern drawn to the third side; and a first side portion and a second side portion each formed on the second side and the fourth side opposite to each other.