Ceramic Core Semiconductor Substrate Warpage Reduction
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Solution Overview
Problem
Semiconductor packages with polymer-based core layers face limitations in thickness reduction due to low mechanical stiffness, which affects substrate warpage and overall performance.
Innovation Solution
The use of ceramic or glass dielectric materials with higher Young's modulus and controlled thermal expansion coefficients for the core layer, combined with conductive layers and dielectric layers, and the formation of plated through holes to enhance stiffness and reduce warpage, while maintaining high thermal conductivity and dielectric strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polymer-based core layer material is used, then the substrate can be manufactured with ease, but the mechanical stiffness is low which limits thickness reduction
Solution Approach 1:
The patent changes the material parameter (Young's modulus) by transitioning from polymer-based materials to ceramic or glass dielectric materials. This parameter change enables the core layer to maintain high stiffness even at reduced thickness, resolving the contradiction between ease of manufacture and mechanical stiffness.
Solution Approach 2:
The patent employs composite material structures by combining ceramic or glass dielectric core layers with conductive layers and dielectric layers. This composite approach achieves both high mechanical stiffness and manufacturability through the synergistic properties of different materials.
2Volume of moving object
If core layer thickness is reduced, then the substrate becomes more compact, but the mechanical stiffness decreases leading to increased warpage
Solution Approach 1:
The patent changes the material composition parameter from polymer-based to ceramic/glass dielectric materials with inherently higher Young's modulus. This allows the core layer to be thinner while maintaining sufficient stiffness to prevent substrate warpage, thus reducing volume without compromising stability.
Solution Approach 2:
The patent applies local quality enhancement by using high-stiffness ceramic or glass dielectric materials specifically in the core layer region where mechanical support is most critical. This localized material optimization enables thickness reduction in non-critical areas while maintaining overall substrate stability.
3Strength
If ceramic or glass dielectric materials are used for the core layer, then the stiffness increases, but the manufacturing complexity increases
Solution Approach 1:
The patent uses composite material structures combining ceramic or glass dielectric core layers with conductive and dielectric layers. This composite approach distributes the functional requirements across different material layers, making the manufacturing process more manageable while achieving the desired high stiffness.
Solution Approach 2:
The patent segments the substrate structure into distinct layers (core layer, conductive layers, dielectric layers), each with specific material properties. This segmentation allows for specialized material selection in each layer, managing manufacturing complexity through modular construction while achieving overall high stiffness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a comparable or increased stiffness with reduced core thickness, improving the semiconductor substrate's resistance to warpage and enabling higher density interconnection packages with improved mechanical and thermal properties.
Implementation Method 1
The use of ceramic or glass dielectric materials with higher Young's modulus and controlled thermal expansion coefficients for the core layer, combined with conductive layers and dielectric layers, and the formation of plated through holes to enhance stiffness and reduce warpage
Implementation Method 2
maintaining high thermal conductivity and dielectric strength
Data Source
AI summary
A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element.