Ceramic Electronic Device Bent Portion Through-Holes

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Solution Overview

Problem

The downsizing and capacity enlargement of ceramic electronic devices, such as multilayer ceramic capacitors, lead to reduced thickness of dielectric and internal electrode layers, which can result in delamination and uneven stress distribution, degrading the reliability of the devices.

Innovation Solution

A ceramic electronic device with a multilayer chip design featuring alternately stacked dielectric and internal electrode layers, where a bent portion with through-holes in the internal electrode layers is formed along the stacking direction to suppress delamination and stress concentration, achieved through a manufacturing method involving the formation of pinholes in the metal conductive paste pattern during printing and crimping of the ceramic multilayer structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the thickness of dielectric layers and internal electrode layers is reduced to downsize the ceramic electronic device, then the device size is reduced and capacity is enlarged, but delamination may occur and reliability is degraded

Engineering Contradiction:
Improvedevice sizeVSAvoiddelamination resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

Through-holes are formed in the internal electrode layers before final assembly to create bent portions that will suppress delamination. This preliminary structural preparation ensures that when the device is assembled and subjected to stress, the pre-formed bent portions with through-holes will prevent delamination of the thinned layers, thus resolving the contradiction between reduced thickness and delamination resistance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Through-holes are introduced into the internal electrode layers to create a porous structure. These through-holes form bent portions that increase the path length and mechanical interlocking between layers, thereby suppressing delamination. This allows the use of thinner layers while maintaining reliability through the engineered porous feature

Inventive Principle:
Principle #31Porous materials

2Reliability

If openings are formed in the internal electrode layers to prevent delamination, then delamination is suppressed, but the structure becomes uneven in stacking direction and internal stress is concentrated

Engineering Contradiction:
Improvedelamination suppressionVSAvoidinternal stress distribution
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

Multiple through-holes are distributed at different positions within the internal electrode layers rather than using a single opening. This local distribution creates multiple bent portions that locally suppress delamination while distributing the structural modifications throughout the device, preventing stress concentration at any single location and maintaining more uniform internal stress distribution

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The single opening concept is segmented into multiple through-holes distributed across the internal electrode layers. This segmentation divides the delamination suppression function into multiple localized bent portions, each handling local stress while collectively providing uniform stress distribution throughout the device structure

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11626249B2Ceramic electronic device and manufacturing method of the same
Publication Date: 2023.04.11 TAIYO YUDEN KK
  • US11626249B2 patent drawing
  • US11626249B2 patent drawing
  • US11626249B2 patent drawing

AI summary

A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure. A bent portion, in which the plurality of dielectric layers in a substantially same position along a stacking direction project along the stacking direction, is formed in the multilayer chip. In the bent portion, a through-hole is formed in two or more of the plurality of internal electrode layers. The through-hole is a defect portion in a first direction in which the first end face faces with the second end face and in a second direction that is vertical to the first direction in a plane of the plurality of internal electrode layers.