Ceramic Edge Coating for Low-Particle Semiconductor Chamber Parts
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Solution Overview
Problem
Semiconductor manufacturing apparatus members face challenges in reducing particle generation due to plasma damage, particularly at the edge portions of the base, which affects the yield and durability of semiconductor devices.
Innovation Solution
A semiconductor manufacturing apparatus member is designed with a base having a particle-resistant layer that includes a polycrystalline ceramic, where the edge portion is covered with a first particle-resistant layer with higher resistance than the second layer on the surface, reducing plasma damage and enhancing durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thermal-sprayed film is formed on the front surface of the base to provide plasma resistance, then particle resistance is improved, but cracks and peeling occur in the film reducing durability
Solution Approach 1:
The particle-resistant layer is divided into two distinct layers: a first particle-resistant layer with higher particle resistance formed at the edge portion, and a second particle-resistant layer with lower particle resistance formed at the first surface. This segmentation allows each layer to be optimized for its specific function, preventing the uniform structure that leads to cracking and peeling.
Solution Approach 2:
Different regions of the base receive different particle-resistant layer configurations. The edge portion receives a first particle-resistant layer with higher particle resistance, while the first surface receives a second particle-resistant layer with lower particle resistance. This local differentiation addresses the specific plasma damage risks at different locations without causing uniform structural weakness.
2Reliability
If the entire surface is coated with high particle resistance material, then particle resistance is improved, but manufacturing complexity and cost increase
Solution Approach 1:
Instead of uniformly coating the entire surface with high particle resistance material, the invention applies different particle-resistant layer configurations to different regions. The edge portion receives enhanced protection while the first surface has a different layer structure, optimizing both performance and manufacturability.
Solution Approach 2:
The coating process is segmented into forming a first particle-resistant layer at the edge portion and a second particle-resistant layer at the first surface. This segmentation allows for targeted application methods that can simplify manufacturing compared to uniform high-performance coating across the entire surface.
3Reliability
If the particle-resistant layer is made uniformly thick, then plasma resistance is improved, but particle generation occurs due to peeling at the edge portions
Solution Approach 1:
The particle-resistant layer is configured with different characteristics at different locations. The first particle-resistant layer at the edge portion has higher particle resistance and is specifically designed to prevent peeling, while the second particle-resistant layer at the first surface has lower particle resistance. This local differentiation eliminates the peeling issue at edges without compromising overall plasma resistance.
Solution Approach 2:
The particle-resistant layer is segmented into a first particle-resistant layer and a second particle-resistant layer with different properties. This segmentation prevents the uniform thickness problem that causes edge peeling while maintaining adequate plasma resistance across the entire surface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces plasma damage at the edge portions, providing improved particle resistance and durability, thus enhancing the yield and quality of semiconductor devices.
Implementation Method 1
it is desirable for the semiconductor manufacturing apparatus members used in the chamber and in the periphery of the chamber to be plasma-resistant
Data Source
AI summary
According to one embodiment, a semiconductor manufacturing apparatus member includes a base and a particle-resistant layer. The base includes a first surface, a second surface crossing the first surface, and an edge portion connecting the first surface and the second surface. The particle-resistant layer includes a polycrystalline ceramic and covering the first surface, the second surface, and the edge portion. The particle-resistant layer includes a first particle-resistant layer provided at the edge portion, and a second particle-resistant layer provided at the first surface. A particle resistance of the first particle-resistant layer is higher than a particle resistance of the second particle-resistant layer. A thickness of the first particle-resistant layer is thinner than a thickness of the second particle-resistant layer.