Ceramic Dielectric Fin Isolation for Dense FinFET Source/Drain Regions

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Solution Overview

Problem

As semiconductor devices, such as FinFETs, undergo miniaturization, challenges arise in preventing coalescing of epitaxial source/drain regions and ensuring adequate electrical isolation, mechanical strength, and reduced defects in the manufacturing process.

Innovation Solution

The formation of dielectric fins using ceramic dielectric materials between epitaxial source/drain regions, which provides mechanical strength, reduces CMP loading, and enhances etching selectivity, thereby minimizing defects and improving the reliability of FinFETs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional isolation regions are used in miniaturized semiconductor devices, then device integration density is improved, but coalescing of epitaxial source/drain regions occurs and electrical isolation deteriorates

Engineering Contradiction:
Improvedevice integration densityVSAvoidelectrical isolation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the material parameter of the isolation region from conventional dielectric materials to ceramic dielectric materials. This material parameter change provides several benefits: (1) ceramic dielectric materials have higher mechanical strength that prevents coalescing of epitaxial source/drain regions during processing, (2) they exhibit better etching selectivity that maintains electrical isolation, and (3) they reduce CMP loading during planarization processes. This parameter change resolves the contradiction by enabling higher integration density while maintaining reliable electrical isolation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs ceramic dielectric materials as composite materials for the isolation region. These ceramic dielectric materials represent a composite approach that combines the insulating properties of dielectric materials with the mechanical strength and etching resistance of ceramic materials. This composite material solution allows the isolation region to simultaneously provide electrical isolation, mechanical support to prevent coalescing, and process stability, thereby resolving the contradiction between integration density and electrical isolation reliability.

Inventive Principle:
Principle #40Composite materials

2Productivity

If feature sizes are reduced to increase integration density, then productivity is improved, but manufacturing precision deteriorates due to increased defects

Engineering Contradiction:
Improveintegration densityVSAvoiddefect density
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent changes the material parameter of the isolation region to ceramic dielectric materials, which have superior mechanical strength and etching selectivity. These parameter changes lead to reduced defects during manufacturing processes: the enhanced mechanical strength prevents structural defects during processing, while improved etching selectivity reduces void formation and other etching-related defects. This resolves the contradiction by enabling miniaturization while maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional dielectric materials are used for isolation regions, then ease of manufacture is maintained, but mechanical strength is insufficient leading to coalescing defects

Engineering Contradiction:
ImproveprocessabilityVSAvoidmechanical strength
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent employs ceramic dielectric materials that combine the desirable properties of conventional dielectric materials (ease of deposition, insulation) with the mechanical strength of ceramic materials. This composite material approach maintains ease of manufacture through standard deposition techniques while providing the enhanced mechanical strength needed to prevent coalescing of epitaxial source/drain regions during subsequent processing steps.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20240379450A1Transistor isolation regions
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240379450A1 patent drawing
  • US20240379450A1 patent drawing
  • US20240379450A1 patent drawing

AI summary

In an embodiment, a device includes: an isolation region on a substrate; a first semiconductor fin protruding above the isolation region; a second semiconductor fin protruding above the isolation region; and a dielectric fin between the first semiconductor fin and the second semiconductor fin, the dielectric fin protruding above the isolation region, the dielectric fin including: a first layer including a first dielectric material having a first carbon concentration; and a second layer on the first layer, the second layer including a second dielectric material having a second carbon concentration, the second carbon concentration greater than the first carbon concentration.