Ceramic-Metal Power Package Structure Without Wire Bonding
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Solution Overview
Problem
Conventional semiconductor power package structures face challenges in manufacturing yield and material cost due to complex welding processes and large substrate sizes required for high-power chips, especially in multi-chip configurations.
Innovation Solution
A semiconductor power component featuring a ceramic-metal composite substrate with a heat-dissipating metal layer, bonding metal layer, and metal elements, where the metal elements and bonding metal layer are integrally formed, eliminating the need for additional welding and reducing substrate size, and a filler covering the bonding metal layer and sides of the metal elements and transistors, enhancing heat dissipation and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If spacers are used to adjust spacing during packaging, then proper separation among high-power chips and substrates is maintained, but welding steps must be added which increases manufacturing complexity and decreases manufacturing yield
Solution Approach 1:
The invention extracts and eliminates the spacer component from the packaging structure. By directly bonding the high-power chip to the substrate with the conductive pattern serving both as electrical connection and mechanical support, the spacer is removed entirely, thereby eliminating the associated welding steps and reducing manufacturing complexity while maintaining proper separation through the designed conductive pattern layout
Solution Approach 2:
The invention merges the electrical connection function and mechanical support function into a single integrated structure. The conductive pattern on the substrate simultaneously provides electrical connectivity to the high-power chip and structural support for spacing, eliminating the need for separate spacer components and their associated welding processes
2Reliability
If wire bonding packaging is used for electrical connections, then electrical connections are established, but sufficient area of substrates is required which increases material costs
Solution Approach 1:
The invention extracts and eliminates the wire bonding process from the packaging methodology. By using direct bonding between the high-power chip and the substrate's conductive pattern, wire bonding is removed entirely, allowing for reduced substrate area while maintaining reliable electrical connections through the integrated conductive design
Solution Approach 2:
The invention replaces the mechanical wire bonding system with a direct bonding system. Instead of using flexible wires to establish electrical connections, the substrate's conductive pattern directly bonds to the chip, eliminating the need for extensive substrate area required for wire routing and bonding pads
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves manufacturing yield and reduces material costs by simplifying the packaging process, eliminating the need for wire bonding, and enhancing heat dissipation, making it suitable for high-power applications with reduced substrate size.
Implementation Method 1
The heat-dissipating metal layer is located on the first side of the ceramic insulating layer
Implementation Method 2
The bonding metal layer is located between the ceramic insulating layer and the vertical transistor
Data Source
AI summary
A semiconductor power component includes a ceramic-metal composite substrate, a vertical transistor and a filler. The ceramic-metal composite substrate includes a ceramic insulating layer, a heat-dissipating metal layer, a bonding metal layer and a metal element. The metal element is connected to the bonding metal layer, and the bonding metal layer is located between the ceramic insulating layer and the metal element. The vertical transistor is connected to the bonding metal layer. The vertical transistor includes a conductive pad. The conductive pad is electrically connected to the bonding metal layer. The at least one metal element and the bonding metal layer are integrally formed into one.