Spacer-Bonded Ceramic Power Module for Stable Chip Clearance

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Solution Overview

Problem

Power modules used in hybrid and electric vehicles face challenges in achieving high strength, efficient heat dissipation, and reliable bonding while minimizing volume and electrical losses, especially due to the high voltage and vibration generated by silicon carbide (SiC) or gallium nitride (GaN) semiconductor chips.

Innovation Solution

A power module design featuring a duplex structure of ceramic substrates with spacers, where insulating or conductive spacers maintain a constant interval between the substrates, enhancing heat dissipation and bonding reliability through brazing or soldering processes, and using Ag paste for improved thermal conductivity and bonding strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a power semiconductor chip is mounted between two substrates to achieve high voltage and current output, then the power module can drive motors in hybrid and electric vehicles, but high heat is generated during driving

Engineering Contradiction:
Improveoutput powerVSAvoidheat generation
Core Design Contradiction:
PowerVSTemperature

Solution Approach 1:

The cooling function is segmented into two independent heat sinks positioned on opposite sides of the substrate, allowing heat to be dissipated from both the upper and lower surfaces of the power semiconductor chip simultaneously, rather than relying on a single cooling path

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The heat dissipation approach transitions from one-dimensional (single-sided cooling) to three-dimensional (double-sided cooling with heat sinks on both upper and lower sides), creating multiple thermal pathways for heat removal

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If the interval between ceramic substrates is not constantly maintained, then the structure may be simpler, but the semiconductor chip is not protected and heat dissipation efficiency is reduced

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidstructural complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

A spacer is introduced as an intermediary component between the upper and lower ceramic substrates to maintain a constant interval, protecting the semiconductor chip and ensuring optimal heat dissipation without requiring complex active control mechanisms

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacer is positioned at specific locations between the substrates to maintain the interval where it is most needed for chip protection and heat dissipation, rather than uniformly complicating the entire structure

Inventive Principle:
Principle #3Local quality

3Reliability

If bonding is performed directly between substrates without spacers, then the bonding process is simpler, but bonding reliability is reduced and thermal or mechanical impact on substrates increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidbonding process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The spacer serves as a mediator during the bonding process, positioning the substrates at the correct interval and distributing bonding forces, which improves bonding reliability while actually simplifying the bonding process by providing a mechanical reference

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacer is placed beforehand between the substrates to cushion and distribute the thermal and mechanical impact during bonding, preventing direct stress concentration on the substrates and improving bonding success rate

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves high strength, efficient heat dissipation, and improved bonding reliability, reducing volume and electrical losses, thereby enhancing the performance and lifespan of the power module by maintaining a consistent interval between ceramic substrates and facilitating rapid heat transfer.

Implementation Method 1

a first bonding layer configured to bond the one end of the spacer to the lower ceramic substrate

Methodology Applied
Scientific EffectBrazing: Brazing

Implementation Method 2

bonding the one end of the spacer to the lower ceramic substrate through the medium of the first bonding layer

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 3

a second bonding layer configured to bond the other end of the spacer to the upper ceramic substrate

Methodology Applied
Scientific EffectBrazing: Brazing

Implementation Method 4

bonding the upper ceramic substrate to the other end of the spacer through the medium of the second bonding layer

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 5

using Ag paste for improved thermal conductivity and bonding strength

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4177943B1Power module, and method for manufacturing same
Publication Date: 2024.12.25 AMOSENSE CO LTD
  • EP4177943B1 patent drawingFigure 1
  • EP4177943B1 patent drawingFigure 2
  • EP4177943B1 patent drawingFigure 3~4

AI summary

The present invention relates to a power module and a method for manufacturing same, the power module including: a lower ceramic substrate; an upper ceramic substrate which is disposed spaced apart from the upper portion of the lower ceramic substrate, and on the lower surface of which a semiconductor chip is mounted; spacers each having one end bonded to the lower ceramic substrate and the other end bonded to the upper ceramic substrate; first bonding layers each bonding the one end of each spacer to the lower ceramic substrate; and second bonding layers each bonding the other end of each spacer to the upper ceramic substrate. The present invention maintains a constant distance between the lower ceramic substrate and the upper ceramic substrate by having the spacers arranged therebetween, and thus is advantageous in that the semiconductor chip can be protected and heat dissipation efficiency can be increased.