Ceramic Package Copper-Tungsten Layers for Low-Resistance Power FETs

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Solution Overview

Problem

Ceramic semiconductor device packages face challenges in reducing internal conductor resistance, which affects the performance of high-power semiconductor devices like power FETs, particularly in terms of current and voltage handling.

Innovation Solution

The use of copper tungsten alloy conductor layers spaced by dielectric layers within the ceramic package, along with sidewall metallization and bond fingers, reduces resistance by forming efficient electrical connections through filled vias, and a heat slug for thermal dissipation, while a lid seals the package hermetically.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional ceramic conductors are used in ceramic semiconductor device packages, then the package provides good electrical isolation and hermetic sealing, but the internal conductor resistance is high which degrades performance of power semiconductor devices

Engineering Contradiction:

Improveelectrical isolation and hermetic sealingVSAvoidinternal conductor resistance

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies composite materials by replacing traditional ceramic conductors with copper tungsten alloy conductors embedded in the ceramic substrate. The copper tungsten alloy combines the high electrical conductivity of copper with the high melting point and thermal stability of tungsten, achieving low resistance while maintaining compatibility with the ceramic package structure and hermetic sealing properties.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The patent changes the material parameter of the conductors from traditional ceramic materials to copper tungsten alloy, fundamentally altering the electrical conductivity parameter. This material substitution reduces internal conductor resistance by orders of magnitude while maintaining the structural and hermetic properties of the ceramic package through controlled embedding processes.

Inventive Principle:

Principle #35Parameter changes

2Loss of energy

If more pins are used to reduce resistance, then electrical performance improves, but package complexity and pin count increase

Engineering Contradiction:

ImproveresistanceVSAvoidpin count

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent changes the fundamental parameter of conductor material from ceramic to copper tungsten alloy, which has inherently lower resistivity. This material parameter change enables achieving low resistance with fewer conductors, thereby reducing the required pin count while improving electrical performance.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

By using copper tungsten alloy composite material with superior electrical conductivity, the patent reduces the number of conductors needed to achieve a given resistance level, thereby simplifying the package structure and reducing pin count while maintaining or improving electrical performance.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration results in reduced resistance and inductance, enhanced thermal dissipation, and improved performance for power FETs, allowing for a lower pin count package with increased figure of merit without altering the semiconductor device design or using new materials and tooling.

Implementation Method 1

copper tungsten conductor layers formed in the ceramic package and spaced by dielectric layers

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

heat slug mounted to the board side surface of the ceramic package, forming a bottom surface in a die cavity

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

copper tungsten conductor layers formed in the ceramic package and spaced by dielectric layers

Methodology Applied

Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS11915986B2Ceramic semiconductor device package with copper tungsten conductive layers

Publication Date: 2024.02.27 TEXAS INSTRUMENTS INC

AI summary

A described example includes: a ceramic package having a board side surface and an opposite top side surface; a heat slug mounted to the board side surface of the ceramic package, forming a bottom surface in a die cavity; leads mounted to conductive lands on the ceramic package; sidewall metallization extending from the conductive lands and covering a portion of one of the sides of the ceramic package; copper tungsten alloy conductor layers formed in the ceramic package and spaced by dielectric layers; bond fingers formed of a conductor layer and extending to the die cavity; a semiconductor device mounted over the heat slug, and having bond pads on a device side surface facing away from a surface of the heat slug; electrical connections between bond pads on the semiconductor device and the bond fingers; and a lid mounted to the top side surface of the ceramic package.