Multilayer Ceramic Substrate Cavity Sealing for Low Parasitic Capacitance

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Solution Overview

Problem

Existing multilayer ceramic substrates face issues with parasitic capacitance and environmental sensitivity due to cavities that communicate with the atmosphere, leading to moisture and dust ingress, which affects their characteristics.

Innovation Solution

A multilayer ceramic substrate with cavities that reach to the principal surface and are sealed with a solder sealing member, preventing external moisture and dust entry, while also reducing parasitic capacitance by positioning cavities between opposing conductors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stress or pressure

If cavities are formed to communicate with the atmosphere through vent holes, then internal pressure increase during firing is prevented, but moisture and dust may enter the cavities through the vent holes

Engineering Contradiction:
Improveinternal pressure during firingVSAvoidmoisture and dust ingress
Core Design Contradiction:
Stress or pressureVSObject-affected harmful factors

Solution Approach 1:

The cavity formation process includes creating vent holes during the green sheet stage to allow gas escape during firing, then subsequently sealing these vent holes after firing is complete. This preliminary action of creating vent holes prevents internal pressure buildup during firing, while the later sealing action prevents moisture and dust ingress into the cavities.

Inventive Principle:
Principle #10Preliminary action

2Object-generated harmful factors

If cavities are formed by patterning photosensitive resin on substrate, then parasitic capacitance is reduced, but gas generated during firing does not escape leading to firing defects

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidfiring defects
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The cavity structure is segmented into two functional parts: the cavity space itself for reducing parasitic capacitance, and separate vent holes for gas escape. This segmentation allows the cavity to serve its electrical function while the vent holes handle the thermal processing requirement, preventing firing defects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Vent holes serve as intermediary channels that allow gas to escape from the cavity during firing without compromising the cavity's electrical function. These vent holes act as mediators between the sealed cavity space and the external atmosphere, enabling safe firing while maintaining cavity integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If cavities are sealed to prevent environmental ingress, then reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveprotection from environmental influencesVSAvoidsealing structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sealing of cavity vent holes is merged with the existing soldering process by forming solder lands that extend over the vent hole openings. This combines the sealing function with the electrical connection function, eliminating the need for separate sealing structures and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses parasitic capacitance and protects the substrate from environmental influences, ensuring reliable performance by sealing cavities with a solder sealing member and strategically placing them between conductors.

Implementation Method 1

the opening is covered with a sealing member at the principal surface of the multilayer ceramic substrate

Methodology Applied
Scientific EffectSealing:

Implementation Method 2

Characteristics of a multilayer ceramic substrate are often improved by forming a cavity inside the multilayer ceramic substrate and thereby reducing a parasitic capacitance generated between wiring conductors

Methodology Applied
Scientific EffectParasitic capacitance reduction: Parasitic Capacitance

Implementation Method 3

a land is preferably formed at a position around the opening, and solder that serves as the sealing member is preferably disposed on the land

Methodology Applied
Scientific EffectSolder deposition: Deposition (physical)

Data Source

PatentUS11140778B2Multilayer ceramic substrate and method of manufacturing multilayer ceramic substrate
Publication Date: 2021.10.05 MURATA MFG CO LTD
  • US11140778B2 patent drawing
  • US11140778B2 patent drawing
  • US11140778B2 patent drawing

AI summary

A multilayer ceramic substrate according to the present disclosure has ceramic layers and a patterned conductor, and a cavity is formed in the multilayer ceramic substrate. The cavity reaches to any one of principal surfaces of the multilayer ceramic substrate and forms an opening, and the opening is covered with a sealing member at the principal surface of the multilayer ceramic substrate.