Engineered Ceramic Substrate for GaN and Silicon Integration

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Solution Overview

Problem

Heteroepitaxial growth of gallium nitride based compound semiconductors on sapphire, silicon carbide, and silicon substrates often results in reduced uniformity and adverse effects on electronic/optical properties, necessitating improved methods and systems for epitaxial growth processes and substrate structures.

Innovation Solution

The integration of elemental and compound semiconductors on a ceramic substrate using an engineered substrate with a polycrystalline core, encapsulating barrier, and bonding layers, allowing for the growth of gallium nitride and silicon-based devices with improved thermal matching and low defect density, enabling broader thickness ranges and integration with standard silicon processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If heteroepitaxial growth is used to grow gallium nitride on sapphire, silicon carbide, or silicon substrates, then the substrate can support device fabrication, but the epitaxial layers exhibit reduced uniformity and adverse effects on electronic/optical properties

Engineering Contradiction:
Improveuniformity of epitaxial layersVSAvoidelectronic/optical properties
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces an intermediary layer structure between the substrate and the gallium nitride epitaxial layer. This includes a buffer layer grown on the substrate, followed by a thin seed layer (e.g., silicon layer) that serves as a transition interface. This intermediary structure mediates the lattice mismatch and thermal expansion differences between the substrate and the compound semiconductor, thereby improving uniformity and reducing defects in the epitaxial layers

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs composite substrate structures combining multiple materials with different properties. For example, a silicon carbide substrate with a silicon buffer layer, or a sapphire substrate with aluminum nitride and silicon layers. These composite structures leverage the advantageous properties of each material (thermal conductivity, lattice matching, mechanical strength) to overcome the limitations of single-material substrates, resulting in improved epitaxial layer quality

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If standard silicon substrates are used for gallium nitride growth, then existing silicon processing infrastructure can be utilized, but thermal mismatch causes high defect density

Engineering Contradiction:
Improveintegration with standard silicon processesVSAvoiddefect density
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent uses a thin silicon seed layer (e.g., 1-10 nm) as an intermediary between the silicon substrate and the gallium nitride epitaxial layer. This ultra-thin silicon layer acts as a transition interface that reduces the thermal mismatch stress while maintaining compatibility with silicon processing. The buffer layer beneath it provides mechanical support and further stress management

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the substrate structure by adding thin film layers with specific thicknesses and material compositions. By controlling the thickness parameters (e.g., buffer layer thickness of several micrometers, seed layer thickness of nanometers) and material properties, the system optimizes thermal stress distribution and lattice matching, thereby reducing defect density while maintaining silicon substrate compatibility

Inventive Principle:
Principle #35Parameter changes

3Reliability

If thick epitaxial layers are grown to achieve desired device performance, then device functionality is improved, but defect density increases and uniformity decreases

Engineering Contradiction:
Improvedevice functionalityVSAvoiduniformity and defect density
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs a carefully engineered buffer layer and thin seed layer as intermediaries that enable the growth of thick epitaxial layers with reduced defect propagation. The buffer layer absorbs thermal stress and prevents dislocation propagation from the substrate, while the thin seed layer provides a high-quality nucleation interface. This allows thick layers to be grown for device functionality without proportionally increasing defect density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent optimizes growth parameters including layer thickness, composition gradients, and growth temperature profiles. By controlling these parameters, the system enables growth of thicker epitaxial layers while maintaining uniformity. The buffer layer thickness and composition are specifically tuned to manage stress accumulation, allowing thicker active layers to be grown without reaching critical stress thresholds that would cause defects

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach achieves extremely low defect density device layers, broader thickness ranges, and retention of improved thermal performance, enabling integration of III-V compound semiconductor devices with CMOS, RF, LEDs, and power devices at a chip level.

Implementation Method 1

a barrier layer encapsulating the polycrystalline substrate

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

a bonding layer coupled to the barrier layer

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS11328927B2System for integration of elemental and compound semiconductors on a ceramic substrate
Publication Date: 2022.05.10 QROMIS INC
  • US11328927B2 patent drawing
  • US11328927B2 patent drawing
  • US11328927B2 patent drawing

AI summary

A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.