Ceramic TSV Package Structure for Tapered Via Deposition
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Solution Overview
Problem
The miniaturization of electronic devices has highlighted the need for improved heat dissipation and more reliable through via connections in semiconductor devices, as existing technologies face challenges in achieving efficient data transmission and reliability due to the formation of through vias.
Innovation Solution
The use of a ceramic substrate with selectively formed via holes using lower power diode-pumped solid state lasers for controlled thermal processing, resulting in tapered cross-sections that facilitate seed material deposition and improve the formation of through substrate vias, which are then used to enhance electrical connections and thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional laser drilling is used to form via holes, then via holes can be formed quickly, but the via holes have vertical sidewalls that make seed material deposition difficult
Solution Approach 1:
The patent changes the laser processing parameters (power, pulse duration, repetition rate) to transform the via hole sidewall profile from vertical to tapered. By using lower power and higher repetition rate, the laser ablation process creates a gradual slope instead of a vertical wall, making the via holes suitable for seed material deposition while maintaining formation efficiency
Solution Approach 2:
The patent employs periodic laser pulsing with high repetition rates to achieve controlled thermal accumulation. This periodic action allows the laser energy to be delivered in rapid succession, creating the desired tapered profile through thermal effects while maintaining high productivity through automated continuous processing
2Productivity
If high power lasers are used for via hole formation, then via holes can be drilled quickly, but thermal damage and cracking occur in the ceramic substrate
Solution Approach 1:
The patent fundamentally changes the laser power parameter from high to low, combined with adjusted pulse duration and repetition rate. This parameter transformation enables via hole formation without the thermal damage and cracking that occur with high power lasers, preserving substrate integrity while maintaining acceptable drilling speed
Solution Approach 2:
The patent converts the previously harmful thermal effects (which caused cracking) into a beneficial controlled thermal process. By using lower power with higher repetition rates, the thermal energy accumulates in a controlled manner to create the desired tapered profile without exceeding the substrate's thermal damage threshold
3Device complexity
If via holes with vertical sidewalls are formed, then the drilling process is simple, but electrical connection reliability is reduced
Solution Approach 1:
The patent modifies laser parameters to create tapered sidewalls that provide better mechanical interlocking and surface area for electrical connections. The changed parameters produce a profile that enhances connection reliability between via holes and conductive materials, overcoming the limitations of vertical sidewalls
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and electrical performance of semiconductor devices by improving heat dissipation and data transmission speed through the use of ceramic substrates with optimized via hole structures, leading to more efficient semiconductor packages.
Implementation Method 1
selectively formed via holes using lower power diode-pumped solid state lasers for controlled thermal processing
Implementation Method 2
tapered cross-sections that facilitate seed material deposition
Data Source
AI summary
A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.