Via Formation in Ceramic Carrier Layers via Active Soldering

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Solution Overview

Problem

Existing methods for producing plated-through holes in ceramic carrier layers are complex and lack control, requiring additional steps and not efficiently addressing parasitic induction effects and thermomechanical stresses.

Innovation Solution

A method involving the use of an active soldering or DCB process to form plated-through holes by filling ceramic carrier layer through-holes with a paste, where the soldering temperatures create the plated-through hole, and adjusting parameters like degree of filling and process pressure to set specific electrical resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If additional work steps are used to form plated-through holes separately, then manufacturing precision can be improved, but device complexity and production time increase

Engineering Contradiction:
Improveplated-through hole qualityVSAvoidproduction process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the formation of plated-through holes with the active soldering process by applying paste containing solder material and active component into the through-holes before the soldering step. The active soldering simultaneously creates both the mechanical connection and the plated-through hole structure, eliminating the need for separate plating operations and reducing overall process complexity while maintaining precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The paste is applied to the through-holes in advance of the active soldering process. This preliminary application ensures that the solder material is already positioned correctly in the through-holes before the soldering takes place, allowing the plated-through holes to form automatically during the soldering step without requiring additional separate operations.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If through-holes are filled completely with paste, then electrical resistance control is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical resistance controlVSAvoidproduction simplicity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent controls electrical resistance by adjusting parameters of the paste application process, such as the amount of paste applied, the degree of filling (partially or completely), and the composition of the paste. By varying these parameters, specific electrical resistance values can be achieved without requiring complex additional manufacturing steps, as the resistance control is integrated into the paste application and soldering process.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the production of plated-through holes, reduces additional work steps, and allows for controlled electrical resistance adjustment, enhancing the compact arrangement of components and reducing parasitic induction and thermomechanical stresses.

Implementation Method 1

the temperatures used when carrying out the active soldering method can also be used to form the plated-through hole

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

carrying out a connection method for connecting a metallization to the carrier layer by means of an active soldering method

Methodology Applied
Scientific EffectActive soldering: Soldering

Implementation Method 3

If the metallization is connected by means of a DCB process

Methodology Applied
Scientific EffectDCB bonding: Oxidation

Data Source

PatentEP3649834B1Method for producing a via in a carrier layer produced from a ceramic and carrier layer having a via
Publication Date: 2021.07.14 ROGERS GERMANY
  • EP3649834B1 patent drawingFigure 1a~1c
  • EP3649834B1 patent drawingFigure 1d
  • EP3649834B1 patent drawingFigure 2

AI summary

The invention relates to a method for producing a via in a carrier layer (1) produced from a ceramic, comprising: providing the carrier layer (1), creating a through-hole (2) in the carrier layer, at least partially filling the through-hole with a paste, and carrying out a connecting method for connecting a metallization to the carrier layer, in particular an active solder method or a DCB method, the via being created from the paste in the through-hole when the connecting method is carried out.