Ceramic Wiring Board Void Suppression Layer
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Solution Overview
Problem
Conventional ceramic wiring boards experience decreased bonding strength and increased electrical resistance due to void formation caused by reactions between solder layers and diffusion preventive layers during semiconductor element bonding, particularly when using Au—Sn alloys, which can lead to characteristic deterioration of optical semiconductor elements.
Innovation Solution
A ceramic wiring board structure that includes a void suppression layer made of Au or an Au—Sn alloy with a high Au content interposed between the second diffusion preventive layer and the solder layer, preventing void formation and maintaining bonding strength by controlling the composition and thickness of these layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diffusion preventive layer is used to prevent Au diffusion into the solder layer, then Au diffusion is prevented, but voids form due to Sn diffusion into the diffusion preventive layer
Solution Approach 1:
An intermediary layer is introduced between the diffusion preventive layer and the solder layer to act as a mediator that prevents Sn diffusion into the diffusion preventive layer while maintaining the diffusion prevention function. This intermediary layer serves as a buffer zone that eliminates the harmful interaction between Sn and the diffusion preventive layer, thereby preventing void formation without compromising the diffusion barrier function.
Solution Approach 2:
The原本是单一的扩散防止层结构被分割为多个功能层，包括扩散防止层、中间层和焊料层。通过这种分割，使得每一层可以专注于特定功能：扩散防止层专注于防止Au扩散，中间层专注于防止Sn扩散和减少应力，焊料层专注于连接功能。这种功能分离解决了单一层结构无法同时满足多种性能要求的矛盾。
2Ease of manufacture
If Au—Sn alloy is used as solder layer, then bonding function is achieved, but melting point increases due to Au diffusion
Solution Approach 1:
The intermediary layer acts as a physical barrier that prevents Au atoms from diffusing into the Sn-based solder layer during the bonding process. This maintains the intended composition and melting point of the solder layer, ensuring proper bonding functionality without the harmful effect of elevated melting point that would result from Au diffusion.
3Strength
If Sn alloy with higher Sn concentration is used, then softness increases, but void formation increases due to Sn diffusion
Solution Approach 1:
The intermediary layer serves as a protective barrier between the high-Sn concentration solder layer and the diffusion preventive layer. This allows the solder layer to maintain its high Sn concentration and associated softness without causing excessive Sn diffusion into the diffusion preventive layer, thereby preventing void formation while preserving the desired mechanical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses void formation, enhances bonding strength, and prevents an increase in operating current, resulting in improved reliability and performance characteristics of semiconductor elements.
Implementation Method 1
Sn in the solder layer 6, when heated, diffuses into the second diffusion preventive layer 5, which causes the formation of voids near an interface between the solder layer 6 and the second diffusion preventive layer 5
Implementation Method 2
when the wiring board is heated in order to bond the semiconductor element
Data Source
AI summary
A ceramic wiring board 10 includes a ceramic substrate 11 and a wiring layer 12 formed on the ceramic substrate 11. The wiring layer 12 includes a wiring part 13 and a connection part 14, the wiring part 13 having a base metal layer 15, a first diffusion preventive layer 16 and a first Au layer 17 which are stacked in sequence on a surface of the ceramic substrate 11, and the connection part 14 having a second diffusion preventive layer 19, a void suppression layer 20 and a solder layer 18 which are stacked in sequence at a desired position on the wiring part 13. The void suppression layer 20 is made of, for example, Au or an Au—Sn alloy containing 85 mass % or more of Au.