Modulating Contact Etch Stop Layer Stress via UV Curing

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Solution Overview

Problem

Conventional methods for forming stressed channel regions in MOS devices require separate deposition processes for tensile and compressive stresses, leading to high costs and adverse RC delay due to the use of silicon nitride with high dielectric constant, necessitating new approaches to apply beneficial stresses to NMOS and PMOS devices.

Innovation Solution

A method involving a substrate with a stressed layer that undergoes a post-treatment such as UV curing, laser curing, or e-Beam curing to modulate the stress, allowing a single contact etch stop layer to achieve tensile stress over NMOS devices and compressive stress over PMOS devices, using materials like carbon-doped silicon oxide or nitride.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate deposition processes are used to form tensile and compressive CESLs for NMOS and PMOS devices, then different stresses can be applied to improve device performance, but the fabrication complexity and cost increase significantly

Engineering Contradiction:

Improvedevice performanceVSAvoidfabrication complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of tensile and compressive CESLs into a single deposition process. A unified CESL layer is deposited over both NMOS and PMOS devices, and then a plasma treatment is applied to selectively modify the stress characteristics in different regions. This eliminates the need for separate deposition processes while maintaining the ability to provide appropriate stress to each device type.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent applies local quality by using photolithography masks to define specific regions that will receive plasma treatment. The plasma treatment selectively modifies the CESL properties only in designated areas (e.g., over PMOS devices), while leaving other areas unchanged. This allows different stress characteristics to be achieved in different locations from a single deposited layer.

Inventive Principle:

Principle #3Local quality

2Stress or pressure

If silicon nitride is used as CESL material to provide stress, then stress can be effectively applied, but the high dielectric constant increases RC delay

Engineering Contradiction:

ImprovestressVSAvoidRC delay

Core Design Contradiction:

Stress or pressureVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter by selecting CESL materials with lower dielectric constants than traditional silicon nitride. Materials such as silicon oxide, silicon oxynitride, or carbon-doped silicon nitride are used. These materials provide sufficient stress while reducing the dielectric constant, thereby decreasing the RC delay and improving circuit performance.

Inventive Principle:

Principle #35Parameter changes

3Stress or pressure

If plasma treatment is applied to modify CESL stress, then stress can be adjusted, but not all CESL materials respond desirably to plasma treatment

Engineering Contradiction:

ImprovestressVSAvoidmaterial compatibility

Core Design Contradiction:

Stress or pressureVSAdaptability or versatility

Solution Approach 1:

The patent selects CESL materials that are specifically compatible with plasma treatment. Materials such as silicon oxide, silicon oxynitride, and carbon-doped silicon nitride are chosen because they respond predictably and effectively to plasma exposure. The plasma treatment parameters (power, pressure, gas composition, treatment time) are optimized to achieve the desired stress modification in these specific materials.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the process by forming a single contact etch stop layer with modulated stresses, reducing parasitic capacitance and RC delay, while maintaining improved device performance without increasing fabrication complexity.

Implementation Method 1

performing a post-treatment to modulate a stress of the stressed layer, wherein the post-treatment is selected from the group consisting essentially of ultra-violet (UV) curing, laser curing, e-Beam curing

Methodology Applied

Scientific EffectUV curing: Photopolymerisation

Implementation Method 2

Methodology Applied

Scientific EffectLaser curing: Laser

Implementation Method 3

Methodology Applied

Scientific Effecte-Beam curing: Electron Beam

Implementation Method 4

performing an electromagnetic radiation treatment on the stressed layer, wherein the first-type stress of an unmasked portion of the stressed layer is convert to a second-type stress

Methodology Applied

Scientific EffectElectromagnetic radiation treatment: Electromagnetic Induction

Data Source

PatentUS7629273B2Method for modulating stresses of a contact etch stop layer

Publication Date: 2009.12.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method for forming a semiconductor structure includes providing a substrate comprising a first device region, forming a metal-oxide-semiconductor (MOS) device in the first device region, forming a stressed layer over the MOS device, and performing a post-treatment to modulate a stress of the stressed layer. The post-treatment is selected from the group consisting essentially of ultra-violet (UV) curing, laser curing, e-Beam curing, and combinations thereof.