Complex Function Block Placement on Programmable ICs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional placement techniques for complex function blocks (CFBs) on programmable integrated circuits (ICs) are inefficient due to the scarcity of available sites, violating the assumption of nearby suitable locations, which leads to unsatisfactory results.
Innovation Solution
A computer-implemented method that uses an undirected graph to represent the circuit design, calculates edge weights based on connection delays and distances, and applies an annealing process to minimize a cost function, allowing for initial placement of CFBs prior to look-up tables and flip-flops, and adjusts penalties for over-budgeted delays and distances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional placement techniques using floating point coordinate system are used, then placement of LUTs and flip-flops is efficient, but placement of complex function blocks becomes unsatisfactory due to scarcity of suitable sites
Solution Approach 1:
The placement process is segmented into two distinct phases: first placing complex function blocks (CFBs) using a dedicated method that accounts for site scarcity, then placing LUTs and flip-flops using conventional floating point coordinate techniques. This segmentation allows each component type to be placed with appropriate methodology, resolving the contradiction between overall efficiency and CFB-specific accuracy.
Solution Approach 2:
Different placement strategies are applied to different component types based on their specific requirements. CFBs receive specialized placement handling due to their scarcity and specific site requirements, while LUTs and flip-flops use the standard floating point coordinate system. This local quality approach ensures each component type is placed with optimal precision for its characteristics.
2Device complexity
If floating point coordinate system is used for initial component assignment, then placement process is simplified, but the assumption of nearby suitable sites is violated for CFBs
Solution Approach 1:
The placement methodology is segmented so that CFBs are placed first using a site-aware approach that validates the nearby site assumption, followed by placement of other components using the simpler floating point system. This segmentation maintains reliability for CFBs while preserving process simplicity for other components.
Solution Approach 2:
CFBs are placed in advance before other components, establishing their positions based on available sites and connection requirements. This preliminary action ensures that the placement assumption of nearby suitable sites is valid for CFBs, while subsequent components can use the simplified floating point coordinate system without violating this assumption for already-placed CFBs.
3Productivity
If CFBs are placed together with LUTs and flip-flops, then overall placement is streamlined, but CFB placement quality deteriorates due to site scarcity
Solution Approach 1:
The placement operation is segmented into sequential phases: CFB placement followed by LUT and flip-flop placement. This segmentation prioritizes CFB placement precision by handling it separately, while still achieving overall placement completion through the subsequent placement of other components. The segmentation resolves the contradiction by ensuring CFB quality without completely sacrificing overall throughput.
Solution Approach 2:
CFBs are placed preliminarily before other components, allowing their positions to be optimized based on site availability and inter-connections. This preliminary placement of CFBs ensures high precision for these critical components, while the subsequent placement of LUTs and flip-flops maintains overall productivity by completing the full placement process.
Data Source
AI summary
A computer-implemented method of implementing a circuit design within an integrated circuit (IC) can include, within an undirected graph representing the circuit design comprising nodes and edges, wherein each node represents a complex function block (CFB) or a pre-placed component of the circuit design and each edge represents at least one connection linking a pair of CFBs of the circuit design, determining an edge weight for each edge. The CFBs can be initially placed and a distance between each pair of CFBs joined by an edge of the undirected graph can be calculated. The CFB placement can be annealed by minimizing a cost function that calculates, for each edge, a product of the edge weight and the distance between the pair of CFBs joined by the edge. The cost function also can sum the products for each edge. The CFB placement can be stored.