CFET Source/Drain Contact Layout for Lower RC Delay

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Solution Overview

Problem

Existing technologies for fabricating complementary metal-oxide-semiconductor field effect transistors (CMOSFETs) have not been entirely satisfactory in all aspects, particularly in reducing parasitic capacitance and resistance, which are crucial for improving the performance of integrated circuits with gate-all-around (GAA) structures.

Innovation Solution

The implementation of L-shape source/drain contacts and a horizontal metal rail to connect the source/drain features of n-type and p-type FETs in CFETs, which decreases parasitic capacitance and resistance by optimizing the connection architecture and materials used in the fabrication process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If conventional fabrication methods are used for CFETs, then manufacturing process is simpler, but parasitic capacitance and resistance are higher

Engineering Contradiction:
Improveparasitic capacitance and resistanceVSAvoidfabrication process complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces a horizontal metal rail extending in the X-direction to connect source/drain features, adding a horizontal dimension to the conventional vertical connection architecture. This dimensional change enables shorter connection paths and reduced parasitic effects by distributing the connection across multiple contact points along the rail, rather than relying on single vertical vias.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The connection architecture is segmented into multiple L-shaped source/drain contacts that connect to a horizontal metal rail, rather than using single direct vertical connections. This segmentation divides the current path into multiple shorter segments, reducing the overall parasitic capacitance and resistance by minimizing the length of each individual connection segment.

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If L-shape source/drain contacts and horizontal metal rail are implemented, then parasitic capacitance and resistance are lower, but manufacturing precision requirements are higher

Engineering Contradiction:
Improveparasitic capacitance and resistanceVSAvoidalignment precision of L-shape contacts and metal rail
Core Design Contradiction:
Object-generated harmful factorsVSManufacturing precision

Solution Approach 1:

The horizontal metal rail is formed first as a preliminary structure before the L-shaped source/drain contacts are created. This preliminary action establishes a fixed reference structure that guides subsequent alignment steps, allowing the contacts to be precisely positioned relative to the rail through self-alignment techniques and pattern transfer processes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The horizontal metal rail serves as an intermediary structure that mediates the connection between source/drain features. This intermediary provides a stable, planar surface that simplifies alignment and reduces the precision requirements for direct contact-to-contact alignment, as the rail acts as a buffer and reference plane for the L-shaped contacts.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If horizontal metal rail is added to connect source/drain features, then RC delay is reduced, but device structure complexity increases

Engineering Contradiction:
ImproveRC delayVSAvoidconnection architecture complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

Multiple connection functions are merged into a single horizontal metal rail structure that serves as a common interconnect for multiple L-shaped source/drain contacts. This merging consolidates what would otherwise require multiple separate vertical vias and interconnect structures, reducing RC delay by providing a low-inductance, low-resistance path while actually simplifying the overall architecture through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240072136A1Semiconductor structure and method for manufacturing the same
Publication Date: 2024.02.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240072136A1 patent drawing
  • US20240072136A1 patent drawing
  • US20240072136A1 patent drawing

AI summary

A semiconductor structure includes a first transistor, a second transistor, a metal rail, and a first source/drain contact and a second source/drain contact. The first transistor has a gate structure, a first source/drain feature, and a second source/drain feature. The first source/drain feature and the second source/drain feature are on opposite sides of the gate structure. The second transistor has the gate structure, a third source/drain feature directly over the first source/drain feature, and a fourth source/drain feature directly over the second source/drain feature. The metal rail extends in an X-direction and adjacent to the gate structure in a Y-direction. The first source/drain contact and the second source/drain contact each has an L-shape in a Y-Z cross-sectional view. The first source/drain contact electrically connects the first source/drain feature to the metal rail. The second source/drain contact electrically connects the fourth source/drain feature to the metal rail.