CFET Dummy Material Doping for Uniform Channel-Spaced Etching
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Solution Overview
Problem
The integration of complementary FET (CFET) devices in semiconductor manufacturing is challenging due to the complexity introduced by miniaturization, which affects the uniformity of the dummy material and the etching rates at different spacings between channel structures.
Innovation Solution
The implementation of additional implantation processes to form doped regions in the dummy material, which helps to adjust the etching rates and ensure uniformity of the dummy material height across different spacings, thereby improving the performance and yield of CFET structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If miniaturization is pursued to improve production efficiency and lower costs, then productivity increases, but manufacturing precision deteriorates due to greater complexity in the semiconductor manufacturing process
Solution Approach 1:
The patent applies local quality by doping specific regions of the dummy material with different dopant concentrations. The dummy material has non-uniform dopant distribution, with first dopants at a first concentration and second dopants at a second concentration, creating locally differentiated properties that enable uniform etching rates across regions with different channel structure spacings
Solution Approach 2:
The patent changes the chemical composition parameters of the dummy material by introducing different dopants at different concentrations. This parameter modification alters the etching characteristics of the dummy material, enabling it to maintain uniform height despite varying spacings between channel structures
2Manufacturing precision
If additional implantation processes are added to form doped regions and improve manufacturing precision, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The patent merges multiple implantation processes into a single integrated step. Both first dopants and second dopants are implanted simultaneously or in a combined sequence, creating doped regions with different concentrations in one operation rather than requiring separate implantation steps for each dopant type
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of doped regions in the dummy material allows for uniform etching and protection of the bottom device region while ensuring proper exposure of the top device region, enhancing the manufacturing process efficiency and CFET structure performance.
Implementation Method 1
an implantation process may be performed to form a doped region in the dummy material in the first space
Data Source
AI summary
Semiconductor structures and methods for manufacturing the same are provided. The method includes forming first channel structures, second channel structures, and third channel structures. The method also includes forming gate dielectric layers surrounding the first channel structures, the second channel structures, and the third channel structures and forming dipole layers over the gate dielectric layers. The method also includes forming a dummy material in a first space between the first and the second channel structures and in a second space between the second and the third channel structures and removing first portions of the dummy material. The method also includes implanting first dopants in the dummy material in the first space and removing second portions of the dummy material in the first space and the second space. The method also includes removing the dipole layers in the top device region and completely removing the dummy material.