CFET Interposer Replacement for NFET and PFET Strain Control

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Solution Overview

Problem

The semiconductor industry faces challenges in managing strain in nanostructure field-effect transistors (FETs) due to the scaling down of ICs, which affects the performance of n-type (NFET) and p-type (PFET) FETs.

Innovation Solution

The solution involves replacing SiGe interposers in NFET devices with substantially pure Ge to increase tensile strain without degrading thickness, and replacing SiGe interposers in PFET device regions with dielectric materials to change tensile strain into neutral or compressive strain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SiGe interposers are used in NFET devices, then tensile strain is provided to improve device performance, but the thickness of the interposer degrades over time

Engineering Contradiction:

Improvedevice performanceVSAvoidinterposer thickness

Core Design Contradiction:

ReliabilityVSLength of stationary object

Solution Approach 1:

The patent changes the material composition parameter of the interposer from SiGe (silicon-germanium alloy) to substantially pure Ge (germanium). This parameter change allows the interposer to provide the necessary tensile strain for NFET device performance while maintaining dimensional stability and preventing thickness degradation over time.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If different interposer materials are used for NFET and PFET devices, then device performance is optimized, but manufacturing complexity increases

Engineering Contradiction:

Improvedevice performanceVSAvoidmanufacturing process

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the substrate into distinct NFET device regions and PFET device regions, allowing different interposer materials to be applied to each region. This segmentation enables independent optimization of each device type while maintaining a systematic manufacturing approach.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses mask layers and deposition processes as intermediaries to apply different interposer materials to different regions. The mask layers act as intermediaries that define where each material type should be deposited, simplifying the manufacturing process by providing clear process control steps.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance of NFET and PFET devices by optimizing strain conditions, leading to improved device performance and manufacturing efficiency.

Implementation Method 1

replacing SiGe interposers in NFET devices with substantially pure Ge to increase tensile strain

Methodology Applied

Scientific EffectLattice mismatch:

Implementation Method 2

replacing SiGe interposers in PFET device regions with dielectric materials to change tensile strain into neutral or compressive strain

Methodology Applied

Scientific EffectStrain transformation:

Data Source

PatentUS20250203970A1Method of forming CFET device by interposer layer replacement and related structures

Publication Date: 2025.06.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method for fabricating a semiconductor device is disclosed. The method involves forming a stack of alternating semiconductor channels and interposers on a substrate, with sacrificial structures between the interposers. Source/drain openings are formed, and strain in the channels is modified. Source/drain structures are formed in the openings, and dielectric layers are deposited. The resulting device features stacked nanostructures with inner spacers of varying heights, enabling improved performance in electronic devices.