CGRA Subarray Reconfiguration for Defect Bypass and Yield Repair
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Solution Overview
Problem
Reconfigurable processors, such as coarse-grain reconfigurable arrays, face challenges in manufacturing yield due to defects, which render some elements unusable, and existing technologies lack effective methods to repair or bypass these defects during operation.
Innovation Solution
A spatially reconfigurable array architecture with spare elements and a parameter store that tags unusable elements, allowing for the reconfiguration of unit placement and routing to incorporate spare elements into the data flow, using virtual addressing and configuration file adjustments to bypass defective units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manufacturing processes are used to produce reconfigurable processors, then production volume is achieved, but manufacturing defects occur that render elements unusable
Solution Approach 1:
The patent applies preliminary action by pre-allocating spare configurable units and parameter memory during the design phase. These spares are prepared in advance and can be quickly activated through configuration changes when defects are detected, avoiding the need for physical repairs or device returns.
Solution Approach 2:
The patent changes parameters by modifying the configuration state of the processor elements. By altering which configurable units are activated and how they are interconnected through the interconnect network, defective units are bypassed and spare units are incorporated into the functional array, effectively repairing the device through parameter reconfiguration.
2Device complexity
If defective elements are left unrepaired, then device complexity is reduced, but manufacturing yield decreases
Solution Approach 1:
The patent applies universality by designing spare configurable units that have the same functionality as regular units. These spares can be activated for any defective unit in the array, making the repair mechanism universally applicable throughout the device without requiring defect-specific repair circuits.
Solution Approach 2:
The patent uses copying by creating identical copies of configurable units as spares. These duplicate units can replace defective ones through reconfiguration, allowing the system to replicate functional elements rather than requiring complex repair mechanisms.
3Reliability
If configuration files are modified to bypass defective units, then element usability is improved, but configuration complexity increases
Solution Approach 1:
The patent applies self-service by enabling the configuration system to automatically detect defective units and reconfigure the array to bypass them. The defect repair logic within the processor autonomously manages the reconfiguration process, reducing the burden on external configuration tools and simplifying the overall configuration workflow.
4Productivity
If spare elements are incorporated into the array, then manufacturing yield is improved, but array area increases
Solution Approach 1:
The patent applies merging by integrating spare configurable units within the existing array structure rather than placing them externally. The spares share the same interconnect network and control logic as regular units, consolidating resources and minimizing the additional area required for redundancy.
Data Source
AI summary
A device architecture includes a spatially reconfigurable array of processors, such as configurable units of a CGRA, having spare homogenous subarrays, and a parameter store on the device which stores parameters that tag one or more elements as unusable. Configuration data is distributed using a statically reconfigurable bus system, to implement the pattern of placement of configuration data, in dependence on the tagged elements. As a result, a spatially reconfigurable array having unusable elements can be repaired.