Chained Decryption Accelerator for Reverse-Order Data Processing
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Solution Overview
Problem
Current decryption and decompression accelerators face high latency due to the need for large local memories and the inability to process encrypted data in reverse order, which is required by certain standards like zstandard, leading to inefficiencies in silicon area and operation.
Innovation Solution
Designing an accelerator that can read multiple sections of a compression block in forward or reverse direction and perform decryption operations accordingly, eliminating the need for large memories and allowing chained decryption and decompression operations without buffering, while also optimizing the software flow for efficient job submission and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large local memories are used in decryption and decompression accelerators, then processing capacity is improved, but silicon area and latency are worsened
Solution Approach 1:
The patent segments the decryption and decompression operations into independent functional units that can process data in smaller chunks without requiring large local memories. The accelerator processes encryption blocks individually, using minimal buffering between stages, thereby reducing silicon area while maintaining processing capacity.
Solution Approach 2:
The patent introduces reverse-order processing capability as a new dimension of operation, allowing the accelerator to process encrypted data in reverse sequence without requiring additional memory buffering. This enables the system to handle zstandard-compliant data efficiently with reduced memory requirements.
2Adaptability or versatility
If data is processed in reverse order to meet zstandard requirements, then standards compliance is improved, but latency increases due to buffering requirements
Solution Approach 1:
The patent implements reverse-order processing by inverting the traditional forward-processing approach. The accelerator can process encryption blocks in reverse sequence (from last to first) while maintaining proper authentication tag generation, eliminating the need for buffering and reducing latency while achieving zstandard compliance.
Solution Approach 2:
The patent changes the processing parameter from forward-order to reverse-order, allowing the system to meet zstandard requirements without incurring buffering latency. The accelerator dynamically adjusts processing direction based on data requirements, optimizing both compliance and performance.
3Productivity
If chained decryption and decompression operations are implemented, then processing efficiency is improved, but complexity of the accelerator increases
Solution Approach 1:
The patent merges decryption and decompression operations into a single chained processing pipeline, where the output of one operation directly feeds the next without intermediate buffering. This integration improves processing efficiency by eliminating data movement overhead while managing complexity through modular functional design.
Solution Approach 2:
The patent creates a universal accelerator that can handle multiple operation types (decryption, decompression, and their combinations) through a single integrated structure. The accelerator uses configurable functional units that can operate in different modes, reducing overall system complexity compared to having separate dedicated hardware for each operation.
Data Source
AI summary
Systems, methods, and apparatuses for low-latency page efficient chained decryption and decompression acceleration are described. In one embodiment, a processor comprises a hardware processor core, and an accelerator circuit coupled to the hardware processor core, the accelerator circuit to: in response to a descriptor, comprising an indication of a hash key and encrypted data to be decrypted, from the hardware processor core, perform a determination that the encrypted data is to be read in an encrypted order or a reverse order from the encrypted order, in response to the determination that the encrypted data is to be read in the reverse order, generate a resultant authentication tag in the reverse order for the encrypted data based at least in part on the hash key without reordering the encrypted data in the reverse order into the encrypted order, and, in response to the determination that the encrypted data is to be read in the encrypted order, generate the resultant authentication tag in the encrypted order for the encrypted data based at least in part on the hash key.