Chained Floating-Point Multiply-Accumulate Circuitry Rounding Precision Speed
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Solution Overview
Problem
Conventional chained multiply-accumulate (CMAC) units are slow due to the lengthy process of rounding, which delays the addition operation and reduces the overall performance of data processing systems by increasing clock cycle duration and instruction throughput.
Innovation Solution
The proposed solution involves generating an unrounded product of two floating-point operands and a rounding increment, then adding the unrounded product and the third operand, effectively rounding at the same time as addition, thereby reducing the time taken for the CMAC operation and improving performance by allowing earlier initiation of the addition process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional CMAC units perform rounding before addition, then rounding precision is maintained, but operation time increases and performance decreases
Solution Approach 1:
The patent calculates and prepares the rounding increment in advance during the multiplication stage, so that when the addition stage begins, the rounding adjustment is already computed and can be applied immediately without delaying the addition operation. This preliminary preparation of rounding information allows both precision and speed to be maintained.
Solution Approach 2:
The patent merges the rounding operation with the addition operation by computing the rounded product and adding the addend in a unified computational step rather than performing rounding first then addition. This combining of operations eliminates the sequential delay and achieves simultaneous rounding and addition, improving throughput while maintaining precision.
2Measurement precision
If rounding is performed as a separate preliminary step, then rounding accuracy is ensured, but clock cycle duration increases
Solution Approach 1:
The patent ensures continuous useful action by overlapping the multiplication, rounding, and addition operations in time. The rounding increment is computed during the multiplication phase, and the addition phase begins immediately without waiting for rounding to complete. This continuous pipeline execution eliminates idle cycles and reduces overall operation duration while maintaining accuracy.
Solution Approach 2:
The rounding increment is prepared in advance during the multiplication stage, so that the addition stage does not need to wait for rounding to complete. This preliminary computation of rounding information allows the addition operation to start immediately, reducing clock cycle duration while preserving rounding accuracy.
3Manufacturing precision
If conventional CMAC units round the product before addition, then intermediate precision is controlled, but instruction throughput decreases
Solution Approach 1:
The patent combines the rounding and addition operations into a single integrated step, eliminating the sequential dependency. The rounded product and addend are processed together in one computational cycle, which maintains intermediate precision while doubling the effective throughput by removing the bottleneck of sequential operations.
Solution Approach 2:
The rounding increment is pre-computed during multiplication, so that the addition stage can proceed immediately without waiting for rounding to complete. This preliminary preparation eliminates the throughput bottleneck and allows continuous processing while maintaining precision control.
Data Source
AI summary
Apparatus, method and non-transitory computer-readable medium to store computer-readable code for fabrication of an apparatus. The apparatus comprises instruction decode circuitry to decode instructions and processing circuitry to execute the instructions decoded by the instruction decode circuitry. The processing circuitry comprises chained-floating-point-multiply-accumulate circuitry responsive to a chained-floating-point-multiply-accumulate instruction decoded by the instruction decoder, the chained-floating-point-multiply-accumulate instruction specifying a first floating-point operand, a second floating-point operand and a third floating-point operand, to: generate an unrounded product based on multiplying the first floating-point operand and the second floating-point operand; generate a first rounding increment based on the unrounded product; generate a sum based on adding the unrounded product, a value based on the first rounding increment, and the third floating-point operand; determine a second rounding increment based on the sum; and perform rounding based on the second rounding increment.