Chained Longest Prefix Matching in Programmable Switches

Solution Overview

Problem

Existing switching technologies face challenges with longest prefix matching due to large and time-consuming standard lookups in memory types, and power-intensive ternary lookups that use wildcard values.

Innovation Solution

The method configures unit memories such as SRAMs and TCAMs to implement longest prefix matching tables using an algorithmic approach, where a routing trie is partitioned and root node prefixes are stored in TCAMs with wildcard bits, allowing efficient storage and search while minimizing memory usage and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard lookup memory types are used for longest prefix matching, then the routing table can be searched, but the tables become prohibitively large and search time increases

Engineering Contradiction:

Improvelongest prefix matching capabilityVSAvoidmemory table size

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The routing table is divided into multiple partitions, each storing a subset of routing entries. This segmentation reduces the size of individual memory tables while maintaining complete routing coverage across all partitions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A trie data structure is introduced as an intermediary indexing mechanism. The trie organizes prefix information to enable efficient navigation to relevant routing entries across partitions, reducing the search space without sacrificing matching capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If ternary lookup memory types with wildcard values are used, then longest prefix matching can be performed efficiently, but power consumption increases

Engineering Contradiction:

Improvelongest prefix matching speedVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The routing table is divided into multiple partitions, each storing a subset of routing entries. This segmentation reduces the size of individual memory tables while maintaining complete routing coverage across all partitions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A trie data structure is introduced as an intermediary indexing mechanism. The trie organizes prefix information to enable efficient navigation to relevant routing entries across partitions, reducing the search space without sacrificing matching capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If routing table entries are dynamically added, then the routing table remains up-to-date, but partition overflow occurs requiring rearrangement operations

Engineering Contradiction:

Improverouting table dynamic updatesVSAvoidpartition management complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system dynamically monitors partition capacity and automatically triggers rearrangement operations when thresholds are exceeded. This dynamic adaptation allows the routing table to grow while maintaining balanced partition utilization.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system implements feedback mechanisms that monitor partition fill levels and trigger rearrangement operations when necessary. This feedback loop maintains optimal partition utilization and prevents overflow conditions.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS10778583B2Chained longest prefix matching in programmable switch

Publication Date: 2020.09.15 INTEL CORP

AI summary

Some embodiments provide a method for configuring unit memories (e.g., unit static random access memories (SRAMs) and ternary content addressable memories (TCAMs) of a network forwarding IC to implement a set of longest prefix matching (LPM) tables. Two different methods of providing a longest prefix match (LPM) operation that minimize the use of ternary content addressable memory (TCAM) are presented. Each method takes advantage of the use of match-action stages and the programmability of the unit memories. An algorithmic LPM embodiment is presented which uses a TCAM index with pointers to SRAM partitions that store subtrees of a routing tree (routing trie structure) and performs subtree rearrangements in the partitions upon the addition of certain routing entries. A chained LPM embodiment, allocates separate exact-match tables for a set of address prefix lengths in, for example, SRAMS, as well as a set of non-exact match tables in, for example, TCAMs.