Chalcogenide Memory Array Fuse Data Storage
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Solution Overview
Problem
Conventional memory devices that store fuse data using dedicated fuse arrays at the periphery require significant area and high programming current, leading to increased power consumption and inefficiency.
Innovation Solution
Configuring a memory array within the device to store fuse data using chalcogenide storage elements, which can be programmed multiple times, reducing the need for large drivers and area, and integrating fuse data storage with user data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated fuse arrays are used at the periphery to store fuse data, then data integrity is ensured, but area consumption increases significantly
Solution Approach 1:
The patent merges the fuse array and user data array into a single unified memory array structure. Both fuse data and user data are stored in the same array using the same memory cells, eliminating the need for separate dedicated fuse arrays at the periphery. This integration reduces area consumption while maintaining data integrity through the use of distinct address ranges or mapping schemes that separate fuse data access from user data access.
Solution Approach 2:
The memory array is designed to serve multiple functions: it can store both fuse data (for device configuration and identification) and user data (for general storage operations). The same memory cells, word lines, and bit lines are utilized for both purposes, making the array universal and eliminating redundant structures. This multi-functionality approach resolves the area consumption issue while preserving data integrity through function-specific access protocols.
2Reliability
If conventional fuse arrays are used to store fuse data, then data stability is maintained, but programming current requirements increase power consumption
Solution Approach 1:
The patent changes the programming parameters by using lower current pulses for programming fuse data in the integrated memory array compared to conventional fuse arrays. The memory cells can be programmed using controlled current pulses that are significantly lower than the high programming currents required by traditional fuse structures. This parameter change reduces power consumption while maintaining data stability through the non-volatile nature of the memory cells.
3Reliability
If dedicated fuse arrays are implemented, then fuse data storage is reliable, but device complexity increases
Solution Approach 1:
The patent combines the fuse array and user data array into a single integrated memory structure, reducing device complexity by eliminating redundant components. The unified array uses shared word lines, bit lines, and memory cells for both fuse data and user data storage. This merging approach maintains fuse data storage reliability while significantly reducing the overall device complexity compared to separate dedicated fuse arrays.
Solution Approach 2:
The memory array is designed as a universal structure that handles both fuse data and user data operations, eliminating the need for separate dedicated circuits and control logic for fuse arrays. This multi-functionality reduces device complexity by consolidating hardware resources while maintaining reliable fuse data storage through software or controller-managed access protocols that distinguish between fuse and user data operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and area usage while maintaining data integrity by using reprogrammable chalcogenide memory cells instead of irreversibly blown fuses, enhancing memory device performance and density.
Implementation Method 1
the first state and the second state include a differential pair of states that represent the value of the fuse data
Data Source
AI summary
Methods, systems, devices, and other implementations to store fuse data in memory devices are described. Some implementations may include an array of memory cells with different portions of cells for storing data. A first portion of the array may store fuse data and may contain a chalcogenide storage element, while a second portion of the array may store user data. Sense circuitry may be coupled with the array, and may determine the value of the fuse data using various signaling techniques. In some cases, the sense circuitry may implement differential storage and differential signaling to determine the value of the fuse data stored in the first portion of the array.