Write Circuit for Chalcogenide Memory with Current Trim and Shaping

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Solution Overview

Problem

Conventional write circuits in random access memory designs cannot provide variable write currents and fully compensated currents required by chalcogenide memory devices, which is crucial for precise programming of chalcogenide memory cells.

Innovation Solution

A write circuit comprising a current amplitude trim module, a current amplification and distribution module, and a write current shaping module, which generates well-compensated and amplified write currents to program chalcogenide memory cells, allowing for precise control of current amplitude and duration to achieve the required states for data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional write circuits are used in random access memory designs, then device complexity is reduced, but manufacturing precision and reliability deteriorate because they cannot provide variable write currents and fully compensated currents required by chalcogenide memory devices

Engineering Contradiction:
Improveprogramming precisionVSAvoidwrite circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The write circuit is segmented into three distinct functional modules: a current amplitude trim module for compensating process variations, a current amplification module for providing variable current magnitudes, and a write current shaping module for delivering precisely shaped current pulses. This segmentation allows each module to be optimized independently for its specific function, achieving high programming precision without excessive overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The write circuit employs dynamic current amplitude adjustment through the current amplification module, which can provide different magnitudes of write currents (e.g., first magnitude for crystalline state, second magnitude for amorphous state) based on the desired memory state. This dynamic adaptability enables precise programming across different operating conditions.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If variable write currents are provided to program chalcogenide memory cells, then programming precision is improved, but device complexity increases due to the need for current amplitude trim and amplification modules

Engineering Contradiction:
Improvecurrent control precisionVSAvoidwrite circuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The current amplitude trim module incorporates feedback mechanisms to compensate for process corner variations and ensure accurate current amplitudes are delivered to the chalcogenide memory cells. This feedback-based trimming achieves high current control precision while using standard circuit design techniques.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The circuit changes key parameters including current amplitude (through the amplification module providing different current magnitudes) and current pulse shape (through the shaping module) to achieve precise programming. These parameter changes are controlled through designed circuit elements that adjust electrical characteristics without requiring complex external control systems.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If fully compensated currents are provided across temperature and voltage variations, then reliability is improved, but device complexity increases due to the current amplitude trim module

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidcompensation circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The current amplitude trim module is designed to maintain equipotential current delivery across different operating conditions by compensating for voltage supply variations and temperature effects. This ensures that the write current amplitude remains stable and accurate regardless of environmental changes, improving programming reliability.

Inventive Principle:
Principle #12Equipotentiality

Solution Approach 2:

The trim module performs beforehand compensation for anticipated process corner variations and environmental effects, cushioning against these variations before they affect programming accuracy. This proactive compensation approach ensures reliable operation across the full range of expected operating conditions.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables precise programming of chalcogenide memory cells by providing variable write currents, ensuring uniform programming across different temperatures, voltage supplies, and process corners, thereby enhancing the dynamic range and reliability of chalcogenide memory devices.

Implementation Method 1

Phase transformation is a process of changing a phase change material from an amorphous state into a crystalline state or vice versa. Such phase transformation generally occurs when an electrical field is being applied to a phase change material.

Methodology Applied
Scientific EffectPhase transformation: Phase Change

Implementation Method 2

The electrical properties of chalcogenide are also particularly suitable for data storage applications. Since random access memories made of chalcogenide can easily be integrated with conventional logic circuits

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS8027191B2Write circuit for providing distinctive write currents to a chalcogenide memory cell
Publication Date: 2011.09.27 OVONYX MEMORY TECHNOLOGY LLC
  • US8027191B2 patent drawing
  • US8027191B2 patent drawing
  • US8027191B2 patent drawing

AI summary

A write circuit for providing distinctive write currents to a chalcogenide memory cell is disclosed. The write circuit includes a current amplitude trim module, a current amplification and distribution module, and a write current shaping module. The current amplitude trim module provides a well-compensated current across a predetermined range of temperatures, voltage supplies and process corners intended for programming a chalcogenide memory cell. The current amplification and distribution module amplifies the well-compensated current in order to meet a programming requirement of the chalcogenide memory cell. The write current shaping module supplies an appropriate amount of write “0” current or write “1” current, based on the amplified current, to program the chalcogenide memory cell accordingly.