Chamfered Semiconductor Structure for Crack-Free Chip Separation
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Solution Overview
Problem
The challenge in semiconductor devices is to prevent cracking and simplify the fabrication process, particularly during the semiconductor chip separation process, while maintaining high integration density and reducing parasitic capacitance.
Innovation Solution
A semiconductor device with a chamfered structure is introduced, featuring a semiconductor substrate with a chip area and a scribe lane area, multiple interlayer insulating layers, a low dielectric layer, and through silicon vias, where the substrate, interlayer insulating layers, and low dielectric layer have chamfered surfaces to reduce stress and facilitate easier separation without additional planarization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional flat structures are used in semiconductor chips, then fabrication processes require additional planarization steps, but this increases manufacturing complexity and time
Solution Approach 1:
The chamfered structure is formed in advance during the semiconductor chip fabrication process, before the separation process. By pre-forming the chamfered edges on the semiconductor substrate, interlayer insulating layers, and low dielectric layer, the structure is prepared for easy separation without requiring additional planarization steps during or after fabrication, thus reducing manufacturing time and complexity
2Ease of manufacture
If conventional flat structures are used in semiconductor chips, then separation process requires extensive material removal, but this increases manufacturing complexity
Solution Approach 1:
The chamfered structure is formed in advance during the semiconductor chip fabrication process, creating beveled edges at predetermined locations. This preliminary structuring reduces the amount of material that needs to be removed during the separation process, as the saw blade can follow the pre-formed chamfered path rather than cutting through full-depth material, thereby simplifying the separation process and reducing material waste
3Reliability
If conventional flat structures are used in semiconductor chips, then cracking occurs during separation process, but this reduces product reliability
Solution Approach 1:
The chamfered structure is formed in advance on the semiconductor substrate, interlayer insulating layers, and low dielectric layer at predetermined locations. These pre-formed chamfered edges act as stress relief features that guide the separation cut and prevent stress concentration that would otherwise cause cracking during the sawing process, thereby maintaining chip integrity and reliability
Solution Approach 2:
The chamfered structure converts the potentially harmful stress concentration that occurs during separation into a beneficial stress distribution pattern. The beveled edges of the chamfered structure redirect and distribute the mechanical stress from the sawing process, transforming what would be crack-inducing stress concentrations into controlled separation paths that protect the chip from damage
Data Source
AI summary
A semiconductor device including a semiconductor substrate, a first interlayer insulating layer arranged on the semiconductor substrate, a low dielectric layer arranged on the first interlayer insulating layer, a second interlayer insulating layer and a third interlayer insulating layer sequentially arranged on the low dielectric layer, and a through silicon via penetrating the semiconductor substrate and the first interlayer insulating layer, wherein the semiconductor substrate, the first interlayer insulating layer, and the low dielectric layer constitute a chamfered structure including a first chamfered surface parallel to the top surface of the semiconductor substrate and a second chamfered surface inclined with respect to the top surface of the semiconductor substrate and connected to the first chamfered surface may be provided.