Channel Buffer Block Bias Voltage Control for High Slew Rate

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Solution Overview

Problem

Display driver circuits with high slew rates consume significant power, leading to increased standby current, which is a challenge for low-power, high-resolution portable displays like smartphones and tablets, as they require both high slew rate and low power consumption.

Innovation Solution

A method of operating a channel buffer block that adjusts bias voltages using coupling capacitors during slewing intervals, increasing bias currents to achieve a high slew rate without increasing standby current, by employing a column driver IC with differential amplifiers and coupling capacitors controlled by control voltages and a pulse width control circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the slew rate of a display driver circuit is increased, then the charging speed of pixels is improved, but the standby current increases

Engineering Contradiction:
Improveslew rateVSAvoidstandby current
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by using a coupling capacitor to periodically transfer a coupling pulse signal to the bias line during specific intervals (slewing interval and non-slewing interval). This periodic charging and discharging of the coupling capacitor enables dynamic adjustment of bias voltage without requiring continuous high current, thus achieving high slew rate during active periods while maintaining low standby current during non-active periods

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by making the bias voltage adjustable through the coupling capacitor mechanism. The bias voltage dynamically changes based on the coupling pulse signal, allowing the circuit to adapt its operating characteristics. This dynamic adjustment enables the circuit to achieve high slew rate when needed while returning to low-power state when not needed, resolving the contradiction between speed and energy consumption

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If the resolution of a display is increased, then the display quality is improved, but the charging time for pixels is decreased

Engineering Contradiction:
Improvedisplay resolutionVSAvoidcharging time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies parameter changes by modifying the bias voltage parameter through the coupling capacitor mechanism. By changing the bias voltage during the slewing interval, the circuit achieves higher output current capability, which compensates for the reduced charging time caused by higher resolution. This parameter adjustment allows the display driver to maintain adequate charging time even when driving high-resolution displays

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for a high slew rate output voltage without increasing standby current, thereby reducing power consumption in portable electronic devices, enabling efficient operation of high-resolution displays.

Implementation Method 1

changing bias voltages applied to bias lines in an input stage included in the channel buffer block using a coupling effect of coupling capacitors during a slewing interval

Methodology Applied
Scientific EffectCoupling effect: Capacitance

Data Source

PatentUS9240234B2Method of operating channel buffer block and devices including the channel buffer block
Publication Date: 2016.01.19 SAMSUNG ELECTRONICS CO LTD
  • US9240234B2 patent drawing
  • US9240234B2 patent drawing
  • US9240234B2 patent drawing

AI summary

A method of operating a channel buffer block is provided. The method includes changing bias voltages applied to bias lines in an input stage included in the channel buffer block using a coupling effect of coupling capacitors during a slewing interval and increasing bias currents in the input stage using input voltages and changed bias voltages.