Channel Circuit Early Seek Prediction for Read Performance

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Solution Overview

Problem

In iterative decoding schemes like LDPC codes, decoding delays lead to performance degradation in random read operations, as the hard disk controller must wait for decoding completion before initiating a seek, especially when reading across zones or cylinders, resulting in inefficient data transfer and potential retry requirements.

Innovation Solution

A channel circuit with an early decision module predicts whether a read can be initiated early based on decoding quality information, allowing the seek module to start the seek process before data arrival, thereby reducing decoding delay and improving read performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller waits for decoding completion before initiating a seek, then decoding accuracy is ensured, but random read performance deteriorates due to decoding delay

Engineering Contradiction:
Improvedecoding accuracyVSAvoidrandom read performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by initiating the seek operation before the decoding process completes. The controller starts the seek to the next destination position while the current data is still being decoded, thereby eliminating the waiting period and reducing overall access time without compromising decoding accuracy through early decision-making based on channel quality metrics.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the controller initiates seek immediately without waiting for data arrival, then random read performance improves, but decoding delay increases and may cause retry requirements

Engineering Contradiction:
Improverandom read performanceVSAvoiddecoding delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements feedback mechanisms by using early decision modules that monitor channel quality information and decoding progress. This feedback allows the controller to make informed decisions about when to initiate seeks, balancing the need for early seek initiation with the risk of decoding failures. The system adjusts seek timing based on real-time channel conditions to optimize performance while minimizing retries.

Inventive Principle:
Principle #23Feedback

3Productivity

If parallel processing of data transmission is implemented during seek, then throughput improves, but device complexity increases

Engineering Contradiction:
Improvedata transmission throughputVSAvoidprocessing architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the seek operation with data transmission processing by enabling parallel execution of these functions. The controller combines the seek initiation process with ongoing data transmission and decoding operations, allowing multiple tasks to proceed simultaneously. This integration improves throughput by eliminating sequential bottlenecks while managing complexity through coordinated task management.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8717700B2Channel circuit and seek method
Publication Date: 2014.05.06 KK TOSHIBA
  • US8717700B2 patent drawing
  • US8717700B2 patent drawing
  • US8717700B2 patent drawing

AI summary

A channel circuit includes a reader, a decoder, a prediction module, and a seek module. The reader reads data written in a medium. The decoder performs iterative decoding of the read data. The prediction module predicts whether an early read is possible or not without waiting for arrival of the read data. The seek module continuously initiates a seek when the prediction module predicts that the read is possible.