Channel Device Data Buffering for IO Transfer Latency

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Solution Overview

Problem

Existing channel devices are inefficient in transferring data distributed across multiple memory areas to an input-output (IO) device, as they require multiple commands and data transfers, leading to increased latency and reduced performance.

Innovation Solution

A channel device with a data buffer unit and a transfer controller that uses channel startup information to initiate continuous data transfer between the storage device and the data buffer unit, and an IO device transfer controller to efficiently transfer data between the data buffer unit and the IO device, optimizing data transfer by determining the total transfer amount and managing breakpoints for chain data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional chain data processing is used to transfer data distributed across multiple memory areas to an IO device, then data transfer can be initiated, but the number of commands and transfer operations increases, leading to increased latency and reduced performance

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidtransfer latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The invention segments the data transfer process into two distinct phases: a memory-to-buffer phase where data is read from distributed memory areas into a buffer, and a buffer-to-IO phase where the buffered data is transferred to the IO device. This segmentation allows the memory read operations to be optimized independently from the IO write operations, reducing the total number of commands needed and lowering latency by batching operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention performs preliminary action by first reading all required data from the distributed memory areas into the buffer before initiating the transfer to the IO device. This preliminary data collection phase consolidates multiple scattered memory reads into a single buffered structure, allowing subsequent IO operations to proceed more efficiently without repeated memory access delays.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple separate commands are issued for transferring data from different memory areas to the IO device, then complete data transfer can be achieved, but the complexity of command processing increases

Engineering Contradiction:
Improvedata transfer completenessVSAvoidcommand processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention merges multiple separate data transfer commands into a unified two-phase process. Instead of issuing individual commands for each memory area transfer, the system combines all memory reads into a first phase that populates the buffer, then issues a single consolidated second phase command to transfer the buffered data to the IO device. This merging reduces command processing complexity while maintaining transfer completeness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The buffer acts as an intermediary between the distributed memory areas and the IO device. It receives data from multiple memory locations during the first phase, consolidates it into a unified structure, and then transfers it to the IO device in the second phase. This intermediary approach simplifies command processing by providing a single interface for data collection and a single interface for data delivery, eliminating the need to manage multiple separate transfer commands.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8769167B2Channel device, information processing system and data transfer method
Publication Date: 2014.07.01 FUJITSU LTD
  • US8769167B2 patent drawing
  • US8769167B2 patent drawing
  • US8769167B2 patent drawing

AI summary

A channel device equipped with a data buffer unit storing data transferred between a storage device and an input-output device, a transfer controller transferring continuous data between the storage device and the data buffer unit using channel startup information. The storage device transfer controller transfers first data between the storage device and the data buffer unit using first transfer information stored in the address list and transfers the second data using second transfer information and total transfer amount information stored in the address list after the first data is transferred and an input-output device transfer controller transfers the continuous data between the data buffer unit and the input-output device.