Channel Extension Structure for Low-Resistance Source/Drain Contact
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Solution Overview
Problem
The continuous scaling down of semiconductor device dimensions and increasing demand for higher performance leads to challenges such as reduced contact areas between channel and source/drain structures, increasing resistance, and degrading device performance in nanostructure transistors.
Innovation Solution
The introduction of a channel extension structure with a second sidewall adjacent to the source/drain structure having a greater height than the first sidewall, increasing the contact area and reducing resistance between the channel and source/drain structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the dimensions of semiconductor devices are scaled down continuously, then higher storage capacity and faster processing are achieved, but the contact area between channel and source/drain structures is reduced and resistance increases
Solution Approach 1:
The patent introduces a channel extension structure that extends in the vertical dimension (height) rather than only in the horizontal dimension. The extension structure has a first height that is greater than the second height of the channel structure, creating a stepped configuration. This vertical extension increases the contact area between the channel and source/drain structures without requiring further horizontal scaling, thus resolving the contradiction between device scaling and contact area maintenance.
2Quantity of substance
If the dimensions of semiconductor devices are scaled down continuously, then higher storage capacity is achieved, but the contact area between channel and source/drain structures is reduced and resistance increases
Solution Approach 1:
The channel extension structure utilizes the vertical dimension to compensate for the reduced horizontal contact area. By extending the channel structure vertically with a first height greater than the channel structure's second height, the patent creates additional contact area in the vertical direction, thereby maintaining reliable electrical contact while enabling continued horizontal scaling for higher storage capacity.
3Productivity
If the dimensions of semiconductor devices are scaled down continuously, then device performance is improved, but resistance between channel and source/drain structures increases
Solution Approach 1:
The extension structure reduces resistance by providing an additional conduction path through vertical extension. The first height of the extension structure being greater than the second height of the channel structure creates a stepped configuration that increases the effective contact area, thereby reducing the resistance between the channel and source/drain structures while maintaining improved device performance from continued scaling.
Data Source
AI summary
The present disclosure describes a semiconductor device having a channel extension structure. The semiconductor device includes a channel structure on a substrate. The channel structure includes a central portion and an end portion. The semiconductor device further includes a gate structure wrapped around the central portion of the channel structure, a source/drain (S/D) structure on the substrate and adjacent to the end portion of the channel structure, and an extension structure between the channel structure and the S/D structure. The extension structure has a first sidewall having a first height and adjacent to the end portion of the channel structure and a second sidewall having a second height and adjacent to the S/D structure greater than the first height.