Channel Interleaver Layout for Fast Multi-Code-Block Decoding

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Solution Overview

Problem

In communication systems, particularly in LTE, transmitting multiple code blocks faces challenges in maintaining good channel estimation performance and achieving fast decoding due to interference and the need for synchronized reference signals, which affects the overall transmission performance.

Innovation Solution

An improved channel interleaver design that maps coded bits from multiple code blocks to modulation symbols, time, frequency, and spatial resources, ensuring each code block receives roughly equal protection, and allows for the reconstruction and cancellation of successfully decoded code blocks to reduce interference, enabling faster decoding of remaining code blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple code blocks are transmitted together, then transmission efficiency is improved, but interference between code blocks increases and decoding complexity increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiddecoding complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the transmitted signal into multiple code blocks that can be independently decoded. Each code block is processed separately through the channel estimator and decoder, allowing parallel processing and reducing overall decoding complexity while maintaining high transmission efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary component that manages the processing of multiple code blocks. This intermediary structure coordinates the independent decoding of each code block and handles the combination of results, simplifying the overall system architecture and reducing decoding complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If code blocks are decoded independently, then decoding speed is improved, but channel estimation performance deteriorates

Engineering Contradiction:
Improvedecoding speedVSAvoidchannel estimation performance
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent merges the channel estimation function across all code blocks. A single channel estimator processes signals from multiple code blocks to generate a unified channel estimate, which is then used by all decoders. This combining approach maintains high channel estimation accuracy while allowing independent parallel decoding of each code block

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The channel estimator is designed as a universal component that serves all code blocks simultaneously. It performs the same channel estimation function for each code block using the combined signal, enabling fast independent decoding without sacrificing estimation performance

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If synchronized reference signals are used, then channel estimation accuracy is improved, but transmission flexibility is reduced

Engineering Contradiction:
Improvechannel estimation accuracyVSAvoidtransmission flexibility
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent performs channel estimation using synchronized reference signals in advance, before the actual data transmission. The estimated channel characteristics are stored and reused for decoding multiple code blocks, maintaining high accuracy while allowing flexible transmission scheduling without requiring reference signals for each individual code block

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9590765B2Methods and apparatus to improve performance and enable fast decoding of transmissions with multiple code blocks
Publication Date: 2017.03.07 SAMSUNG ELECTRONICS CO LTD
  • US9590765B2 patent drawing
  • US9590765B2 patent drawing
  • US9590765B2 patent drawing

AI summary

Resource elements from multiple code blocks are separated into different groups, and the code bits of the resource elements within each group are decoded without waiting for a completed reception of a transport block to start decoding. Coded bits from multiple code blocks are similarly separated into different groups, and code blocks containing coded bits within each group are decoded. A first CRC is attached to the transport block and a second CRC is attached to at least one code block from the transport block. An improved channel interleaver maps coded bits of different code blocks to modulation symbols, and maps modulation symbols to time, frequency, and spatial resources, to make sure each code block receives approximately the same level of protection.