Channel Plug Layout for Uniform 3D Memory Etching
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Solution Overview
Problem
Current semiconductor memory devices with vertical channel plugs and stacked cells face challenges in maintaining uniformity and process consistency due to the limitations in channel plug geometry and spacing, which affect the performance and efficiency of the devices.
Innovation Solution
The semiconductor device incorporates a unique arrangement of slit and trench patterns with channel plugs of varying shapes and orientations, including elliptical and circular cross-sections, to optimize spacing and reduce etching loading effects, thereby improving process margins and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If channel plugs are arranged in a regular grid pattern with uniform spacing, then manufacturing process is simple, but etching loading effects cause process inconsistencies and reduced manufacturing precision
Solution Approach 1:
The patent applies asymmetry by configuring channel plugs with different shapes (elliptical vs. circular cross-sections) and varying spacing arrangements. Specifically, first channel plugs adjacent to slits have elliptical cross-sections with major axes at angles to the first direction, while second channel plugs have circular cross-sections. The spacing also varies: first distance from slits to first channel plugs is greater than second distance between first and second channel plugs. This asymmetric configuration balances etching loading effects across different regions, improving etching process consistency and manufacturing precision.
2Productivity
If channel plugs are positioned closer together to increase cell density, then productivity increases, but resistance in word and selection lines increases and performance decreases
Solution Approach 1:
The patent applies local quality by creating different channel plug configurations in different spatial regions. First channel plugs adjacent to slits have elliptical cross-sections with larger dimensions in the first direction, providing lower resistance pathways for current flow. Second channel plugs between first channel plugs have circular cross-sections. This localized variation in channel plug geometry optimizes electrical performance in high-current regions while maintaining high cell density overall, thus improving reliability without sacrificing productivity.
3Ease of manufacture
If channel plugs have uniform circular cross-sections, then manufacturing process is consistent, but etching loading effects cannot be optimized and process margins are reduced
Solution Approach 1:
The patent applies parameter changes by varying the cross-sectional geometry of channel plugs. First channel plugs have elliptical cross-sections with major axes oriented at angles to the first direction, while second channel plugs have circular cross-sections. This parameter variation in channel plug shape allows optimization of etching loading effects across different regions of the memory device, improving process margins and manufacturing precision while maintaining overall process consistency through systematic configuration.
Data Source
AI summary
A semiconductor device includes a slit pattern and a trench pattern disposed to extend substantially in parallel with each other in a first direction and channel plugs between the slit pattern and the trench pattern. The channel plugs include a first channel plug adjacent to the slit pattern. A top surface shape of the first channel plug is an elliptical shape. A long axis direction of the first channel plug and the first direction form an acute angle.