Semiconductor Transistor Channel-Portion Hole for Punchthrough Prevention
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Solution Overview
Problem
Semiconductor transistors with channel-portion holes face issues with punchthrough between source and drain regions due to reduced design rules, leading to increased leakage current and decreased breakdown voltage, particularly with unstable interfacial states and different oxide layers in trench gate structures.
Innovation Solution
The formation of a channel-portion layer inside channel-portion holes in semiconductor devices, where a channel-portion trench pad and layer are stacked at the lower portion of the holes, with a word line insulating and polysilicon layer filling the holes, forming a channel region that contacts the substrate through the sidewalls, thereby optimizing switching characteristics and preventing punchthrough.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the design rule is reduced to increase integration density, then the channel-portion hole diameter decreases and source/drain distance decreases, but punchthrough between source and drain regions occurs
Solution Approach 1:
The channel region is segmented into two parts: a first channel region under the word line pattern and a second channel region around the channel-portion hole. This segmentation allows the second channel region to provide additional channel length that prevents punchthrough between source and drain regions, while the overall device size is reduced through the hole structure.
Solution Approach 2:
The channel region is extended into a vertical/dimensional structure around the channel-portion hole, transforming the traditional planar channel into a three-dimensional configuration. This allows increased channel length without increasing the planar footprint, thereby preventing punchthrough while maintaining high integration density.
2Ease of manufacture
If an etching process is performed to form a trench gate structure, then the transistor structure is created, but unstable interfacial states are generated causing leakage current
Solution Approach 1:
Instead of removing material through etching to form the channel-portion hole, the invention uses a deposition approach where a channel-portion layer is formed to define the hole region. This converts the harmful effect of etching-induced interface states into a beneficial structure where the channel-portion layer itself provides a stable interface, eliminating leakage current issues.
Solution Approach 2:
The channel-portion layer acts as an intermediary material that defines the channel-portion hole region and provides a stable interface between the channel region and the substrate. This intermediary layer prevents direct exposure of unstable substrate interfaces, thereby eliminating leakage current while still enabling trench gate structure formation.
3Ease of manufacture
If different oxide layers are used on the bottom and sidewall of the trench, then the gate oxide structure is formed, but leakage current increases and breakdown voltage decreases
Solution Approach 1:
The invention uses a uniform channel-portion layer material throughout the channel-portion hole region, replacing the heterogeneous structure of different oxide layers on bottom and sidewalls. This homogeneous structure ensures consistent electrical properties, maintains high breakdown voltage, and eliminates leakage current while still allowing gate oxide to be formed conformally on all surfaces.
Data Source
AI summary
According to some embodiments of the invention, transistors of a semiconductor device have a channel region in a channel-portion hole. Methods include forming embodiments of the transistor having a channel-portion hole disposed in a semiconductor substrate. A channel-portion trench pad and a channel-portion layer are sequentially formed at a lower portion of the channel-portion hole. A word line insulating layer pattern and a word line pattern are sequentially stacked on the channel-portion layer and fill the channel-portion hole, disposed on the semiconductor substrate. The channel-portion layer is formed to contact the semiconductor substrate through a portion of sidewall of the channel-portion hole, and forms a channel region under the word line pattern. Punchthrough is prevented between electrode impurity regions corresponding to source and drain regions.