Chaos Random Number Generator FPGA Implementation
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Solution Overview
Problem
Existing true random number generators (TRNGs) based on metastability and jitter require extensive time and cost for parameter adjustments and are difficult to implement on field programmable gate arrays (FPGAs), lacking ease of implementation and high randomness.
Innovation Solution
A chaos random number generator (CRNG) utilizing a chaos system with a pre-processing circuit and post-processing circuit to generate highly unpredictable random numbers, integrated with a noise generation circuit to convert uniform random numbers into normal distribution noise signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metastability-based TRNG or jitter-based TRNG is used, then random number generation capability is achieved, but parameter adjustment time and cost increase significantly
Solution Approach 1:
The patent changes the fundamental operating parameters from analog metastability/jitter states to digital chaos system states. The chaos system uses discrete state transitions in a deterministic chaotic map (e.g., logistic map, tent map) that can be controlled through simple parameter settings rather than extensive analog tuning, thereby reducing adjustment time while maintaining random number generation capability
Solution Approach 2:
The patent replaces the analog circuit mechanisms (metastability latches, ring oscillators) with a digital chaos-based computational system. This substitution transitions from physical analog phenomena to digital mathematical transformations, enabling faster parameter reconfiguration through software or logic control rather than hardware tuning
2Reliability
If metastability-based TRNG or jitter-based TRNG is used, then random number generation capability is achieved, but implementation difficulty on FPGA increases
Solution Approach 1:
The patent replaces analog circuit implementations with digital logic implementations suitable for FPGA. The chaos system is realized through digital arithmetic operations (multiplication, addition, modulo) that map directly to FPGA logic resources, making the design easily implementable and reconfigurable on FPGA platforms
Solution Approach 2:
The patent structures the random number generator as modular components: a chaos system module, a post-processing module (for statistical testing and bit extraction), and control logic. This segmentation allows independent optimization and straightforward integration into FPGA architectures, improving ease of implementation
3Reliability
If analog circuit TRNG is used, then random number generation capability is achieved, but transiting between manufacturing processes requires significant time and cost
Solution Approach 1:
The patent replaces analog circuitry with digital logic circuits that are inherently more compatible with standard digital manufacturing processes. The chaos system implements random number generation through mathematical algorithms executed in digital logic, which can be manufactured using conventional CMOS processes without requiring specialized analog fabrication steps, thereby improving adaptability across different manufacturing processes
Data Source
AI summary
A random number generator includes a pre-processing circuit and a chaos random number generator (CRNG). The pre-processing circuit includes a perturbation source and a control circuit, wherein the control circuit is coupled to the perturbation source. The CRNG, which is coupled to the pre-processing circuit, includes a chaos system and a post-processing circuit, wherein the post-processing circuit is coupled to the chaos system.


