Charge Amplifier Feedback Reset for Fast Offset Stabilization
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Solution Overview
Problem
Existing charge amplifier circuits suffer from offset errors that lead to accuracy deterioration, particularly exacerbated by reduced capacitance and increased gain, posing challenges in low-power applications where fast start-up and reduced power consumption are crucial.
Innovation Solution
The proposed charge amplifier circuit incorporates a delayed reset phase and a dual feedback branch configuration with equal capacitances, allowing for efficient offset cancellation and stabilization while minimizing current consumption, thereby addressing the limitations of existing solutions in low-power contexts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If capacitance in the feedback branch is reduced to improve gain, then amplification capability is improved, but offset error increases
Solution Approach 1:
The patent applies preliminary action by performing offset cancellation before the main amplification operation. A dedicated offset cancellation phase is executed prior to signal amplification, where the amplifier is configured to measure and eliminate offset errors. This preliminary offset removal ensures that subsequent high-gain amplification does not magnify offset errors, thus maintaining output accuracy even when feedback capacitance is reduced for higher gain.
Solution Approach 2:
The patent employs feedback mechanisms through a dual-feedback configuration involving feedback capacitors and switches. During the offset cancellation phase, feedback paths are selectively activated to enable the amplifier to sense and counteract its own offset errors. This feedback approach allows the system to automatically compensate for offset drift without requiring increased feedback capacitance, thereby maintaining both high gain and high accuracy.
2Measurement precision
If gain is increased to improve signal amplification, then sensitivity is improved, but offset error amplification increases
Solution Approach 1:
The patent removes the harmful offset error through preliminary action by executing an offset cancellation phase before signal amplification. During this phase, the amplifier measures and eliminates offset components while the main signal remains dormant or at a known state. This ensures that when high gain is subsequently applied to the signal, the offset error has already been removed and will not be amplified, thus maintaining signal sensitivity without proportionally amplifying offset errors.
Solution Approach 2:
The patent implements periodic action through alternating phases of offset cancellation and signal amplification. The system periodically switches between these two operational modes, with the offset cancellation phase occurring at predetermined intervals (e.g., before signal acquisition or at regular maintenance intervals). This periodic offset removal ensures that even during extended high-gain operation, offset errors are continuously managed and do not accumulate or amplify excessively.
3Power
If conventional charge amplifier is used to achieve high gain, then amplification is improved, but start-up time increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the amplifier circuit during manufacturing or initial setup with optimized component values and pre-calibrated offset cancellation parameters. The offset cancellation phase is designed to execute quickly using pre-stored correction values or pre-biased circuit states. This preliminary preparation eliminates the need for slow convergence or iterative calibration during start-up, enabling the amplifier to reach its high-gain operational state much faster than conventional designs.
Solution Approach 2:
The patent employs dynamics by implementing a dynamic operational mode that adapts the amplifier's behavior based on its operational state. During start-up, the circuit dynamically switches between offset cancellation mode and high-gain amplification mode, with transition timing optimized for rapid deployment. The feedback network and switches are dynamically configured to provide different impedance levels and gain settings appropriate for each phase, enabling fast convergence to the desired operational state without sacrificing high-gain performance.
Data Source
AI summary
A circuit includes an amplifier, a bias voltage node, and a first set of switches configured, based on a first reset signal having a first value, to couple first and second input nodes to the bias voltage node and to couple first and second output nodes of the amplifier. First and second feedback branches each include a respective RC network including a plurality of capacitances. The first and second feedback branches further include a second set of switches intermediate input nodes and the capacitances, and a third set of switches intermediate input nodes and the plurality of capacitances. These switches selectively couple the capacitances to the input nodes and output nodes, based on a second reset signal having a first value. The second reset signal keeps the first value for a determined time interval exceeding a time interval in which the first reset signal has the first value.