Charge Compensation Semiconductor Device With Floating Field Plate
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Solution Overview
Problem
Semiconductor devices with charge compensation structures face significant switching losses and delays due to high stored charge in the space charge region, which affects their efficiency in switching operations.
Innovation Solution
The semiconductor device incorporates a drift region of a first conductivity type, compensation regions of a second conductivity type forming pn-junctions, and a third semiconductor layer with a floating field plate or self-charging charge trap, which reduces switching losses by optimizing the doping concentration and electric field distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If charge compensation structures are used to reduce on-state resistance, then on-state resistance is reduced, but switching delays increase due to high stored charge
Solution Approach 1:
The drift region is divided into multiple zones with different doping concentrations: a first drift region with higher doping concentration to reduce on-state resistance, and a second drift region with lower doping concentration to reduce stored charge and switching losses.
Solution Approach 2:
Different regions of the semiconductor device are assigned different doping concentrations tailored to their specific requirements. The first drift region has higher doping for low resistance, while the second drift region has lower doping for low stored charge. The compensation regions are also locally positioned to provide charge compensation where needed.
2Loss of energy
If doping concentration in the drift region is increased to reduce on-state resistance, then on-state resistance is reduced, but breakdown voltage decreases
Solution Approach 1:
The drift region is divided into multiple zones with different doping concentrations: a first drift region with higher doping concentration to reduce on-state resistance, and a second drift region with lower doping concentration to maintain breakdown voltage and reduce stored charge.
Solution Approach 2:
Different regions of the semiconductor device are assigned different doping concentrations tailored to their specific requirements. The first drift region has higher doping for low resistance, while the second drift region has lower doping for high breakdown voltage and low stored charge.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces switching losses and delays by minimizing stored charge and maintaining low on-state resistance, improving the overall efficiency of the semiconductor device.
Implementation Method 1
output charge QOSS and electric energy EOSS, respectively, stored in the space charge region formed in the off-state and during reverse bias
Implementation Method 2
the compensation principle is based on a mutual compensation of charges in n- and p-doped zones in the drift region of a vertical MOSFET
Implementation Method 3
a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer
Data Source
AI summary
A semiconductor device includes a semiconductor body having a first surface defining a vertical direction and a source metallization arranged on the first surface. In a vertical cross-section the semiconductor body further includes: a drift region of a first conductivity type; at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region and is in low resistive electric connection with the source metallization; a drain region of the first conductivity type having a maximum doping concentration higher than a maximum doping concentration of the drift region, and a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer.