Charge/Discharge Control Circuit for Rapid Power-Down with Large Capacitance Loads
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Solution Overview
Problem
Battery apparatuses with large load capacitance take a long time to enter a power-down state due to the slow rise in voltage of the external negative voltage input terminal, leading to increased processing time and cost during shipment inspections.
Innovation Solution
Incorporating an overdischarge latch circuit and a logic circuit that outputs an overdischarge latch signal based on the voltage of the external negative voltage input terminal, allowing the charge/discharge control circuit to stop current flow quickly by maintaining the power-down state until the voltage exceeds a prescribed threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the voltage of the external negative voltage input terminal VM rises slowly due to large load capacitance, then the battery apparatus can maintain stable operation, but it takes a long time to enter the power-down state during overdischarge
Solution Approach 1:
The overdischarge latch circuit is activated in advance when overdischarge is detected, before the voltage VM has time to rise naturally. This preliminary action sets the latch signal to a state that will immediately trigger the power-down sequence, bypassing the slow voltage rise process that would normally occur with large load capacitance.
Solution Approach 2:
The overdischarge latch circuit acts as an intermediary between the overdischarge detection and the power-down execution. It translates the detection of overdischarge conditions into a latch signal that directly controls the power-down timing, independent of the slow voltage rise caused by large load capacitance.
2Reliability
If the switch 56 is kept on to allow voltage VM to exceed the power-down voltage, then the battery apparatus can enter the power-down state, but processing time increases and manufacturing cost increases
Solution Approach 1:
The overdischarge latch circuit performs preliminary action by detecting overdischarge conditions and setting the latch signal before the voltage VM reaches the power-down threshold. This allows the system to enter power-down state without waiting for the slow voltage rise, dramatically reducing inspection time and improving productivity.
Solution Approach 2:
The overdischarge latch circuit provides feedback about the overdischarge condition to the power-down control mechanism. This feedback loop allows the system to respond immediately to overdischarge detection rather than waiting for the voltage VM to naturally rise, enabling faster power-down entry during manufacturing inspections.
3Loss of energy
If the discharge control FET52 is turned off to stop current flow, then power consumption is reduced, but the voltage VM still rises slowly due to large load capacitance
Solution Approach 1:
The overdischarge latch circuit takes preliminary action by detecting overdischarge and setting the latch signal before the voltage VM has time to rise. This allows the system to enter power-down state immediately through the latch signal rather than waiting for the slow voltage rise that would occur even after turning off the discharge control FET.
Solution Approach 2:
The overdischarge latch circuit serves as an intermediary that decouples the current consumption reduction from the voltage rise timing. It translates the overdischarge detection into an immediate latch signal that triggers power-down, independent of how slowly the voltage VM rises due to large load capacitance.
Data Source
AI summary
There are provided a charge/discharge control circuit and a battery apparatus to which a load having a large capacitance is connected. In the battery apparatus, the charge/discharge control circuit includes an overdischarge latch circuit providing an overdischarge latch signal, based on a discharge control signal supplied thereto and a voltage of an external negative voltage input terminal, and a logic circuit supplied with an overdischarge detection signal and the overdischarge latch signal and providing the overdischarge detection signal to a control circuit while receiving the overdischarge latch signal, to thereby enable the power supply to the load to stop in a short processing time.