Charge-Domain ADC Input Circuit With Dynamic Capacitance Shaping
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Solution Overview
Problem
Existing analogue-to-digital converters (ADCs) face challenges with high power consumption at the input stage due to non-linear characteristics of current-mode techniques, leading to harmonic distortion and increased power usage, which is not efficiently addressed by conventional solutions.
Innovation Solution
A device using a current integrating circuit with a sample and hold circuit that dynamically changes capacitance to convert analogue current signals into digital signals, employing successive approximation ADC methods in the charge domain to avoid linear capacitor constraints and reduce noise immunity, allowing for non-linear capacitors and passive charge-sharing techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If current-mode techniques are used at the ADC input stage, then power consumption is reduced, but non-linear characteristics cause harmonic distortion
Solution Approach 1:
The patent introduces a current integrating sample and hold circuit as an intermediary between the voltage input signal and the ADC. This intermediary converts the voltage signal to current, integrates it on a capacitor, and provides a linear voltage output to the ADC, thereby eliminating the non-linear distortion while maintaining power efficiency.
Solution Approach 2:
The patent replaces the conventional voltage-mode input stage with a current-mode integrating circuit. By substituting the direct voltage sampling approach with current integration followed by voltage conversion, the system achieves both power efficiency and linearity.
2Measurement precision
If linear capacitive means are used to ensure accurate voltage sampling, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent inverts the conventional approach by not requiring the capacitor to be linear for accurate voltage sampling. Instead, it uses a current integrating approach where the capacitor stores charge proportional to the input current, and the subsequent voltage conversion inherently linearizes the relationship, allowing non-linear capacitors to be used.
3Manufacturing precision
If voltage-mode ADC input stage is used, then linearity is maintained, but power consumption increases significantly
Solution Approach 1:
The patent replaces the power-consuming voltage-mode input stage with a current-mode integrating circuit. The current integration approach inherently provides linearity through the charge storage mechanism, eliminating the need for high-power voltage buffering while maintaining accurate signal representation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption, increases immunity to noise, and provides a wide signal dynamic range by operating in the charge domain, eliminating the need for very linear capacitors and allowing for nonlinear capacitors, while maintaining accurate charge sampling.
Implementation Method 1
The sample and hold circuit is adapted for sampling the analogue current signal and integrating it on capacitive means
Data Source
AI summary
A device including a sample and hold circuit for providing a signal related to an input analogue current signal, by sampling the input analogue current signal and integrating it on capacitive means, thereby charging the capacitive means to a charge value. The capacitive means being configurable to dynamically change its effective capacitance value in order to shape a voltage signal present on the capacitive means such that the charge value remains unchanged. The device also including an analogue-to digital conversion (ADC) and control circuit arranged for performing an ADC of the at least one related signal at the output of the sample and hold circuit into an output digital signal, the ADC and control circuit including successive approximation ADC means for considering the value of the voltage signal on the capacitive means and converting the charge value present in the capacitive means into the digital output signal.


