Conductive Charge Equalization Layer for Plasma Etch Arcing

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Solution Overview

Problem

The process of etching vias in dielectric layers for advanced semiconductor devices is hindered by plasma-induced arcing events, leading to substrate damage and reduced production yield due to localized potential differences and plasma instabilities.

Innovation Solution

A technique involving the formation of a conductive charge equalization area or the introduction of an ion species into a sacrificial layer to balance local potential differences, reducing the likelihood of arcing events by enabling lateral charge carrier transport and distributing excess charge across multiple openings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If plasma-assisted etch process is used to form high aspect ratio via openings, then manufacturing precision is improved, but substrate damage occurs due to plasma-induced arcing events

Engineering Contradiction:
Improvevia opening formation precisionVSAvoidsubstrate damage from arcing
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A conductive charge equalization layer is introduced as an intermediary between the dielectric layer and the etch mask. This layer acts as a mediator that redistributes plasma-induced charges laterally, preventing localized charge accumulation that leads to arcing events, while not interfering with the etch process itself

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conductive charge equalization layer creates equipotential conditions across the etch area by laterally redistributing charges. This equalizes the electrical potential distribution, preventing the formation of high potential differences that cause arcing between different regions of the plasma column

Inventive Principle:
Principle #12Equipotentiality

2Ease of manufacture

If conventional etch process is used, then process simplicity is maintained, but production yield decreases due to arcing events

Engineering Contradiction:
Improveprocess simplicityVSAvoidproduction yield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The conductive charge equalization layer is formed before the etch process begins. This preliminary action prepares the structure to handle plasma-induced charges during etching, preventing arcing events that would otherwise reduce production yield, while adding minimal process steps

Inventive Principle:
Principle #10Preliminary action

3Reliability

If charge equalization area is added to balance local potential differences, then arcing probability is reduced, but device complexity increases

Engineering Contradiction:
Improvearcing reductionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive charge equalization layer serves multiple functions: it equalizes charges to prevent arcing, provides a planarization layer for subsequent processing, and can serve as an etch stop layer. This multi-functionality reduces the need for additional separate layers, mitigating the increase in device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the probability of arcing events, thereby enhancing the production yield by creating more uniform etch conditions and preventing substrate damage during the formation of metallization structures in semiconductor devices.

Implementation Method 1

enabling lateral charge carrier transport and distributing excess charge across multiple openings

Methodology Applied
Scientific EffectCharge carrier transport: Conduction (electrical)

Implementation Method 2

a plasma-assisted etch process is performed to form the openings

Methodology Applied
Scientific EffectPlasma: Plasma

Data Source

PatentUS7989352B2Technique for reducing plasma-induced etch damage during the formation of vias in interlayer dielectrics
Publication Date: 2011.08.02 ADVANCED MICRO DEVICES INC
  • US7989352B2 patent drawing
  • US7989352B2 patent drawing
  • US7989352B2 patent drawing

AI summary

By forming a conductive material within an etch mask for an anisotropic etch process for patterning openings, such as vias, in a dielectric layer of a metallization structure, the probability for arcing events may be reduced, since excess charge may be laterally distributed. For example, an additional sacrificial conductive layer may be formed or an anti-reflecting coating (ARC) may be provided in the form of a conductive material in order to obtain the lateral charge distribution.