Charge Injection Corner for Nonvolatile Memory Erase

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Solution Overview

Problem

Current nonvolatile memory cells with charge trap films in gate dielectrics face challenges such as high erase current consumption and poor disturb resistance due to the use of hot hole injection with band to band tunneling, which increases power requirements and circuit area, and requires steep junctions that are difficult to maintain.

Innovation Solution

Implementing Fowler-Nordheim tunneling for erase operations by creating a locally changed physical shape at the gate electrode, allowing charge injection into the charge trap film, which reduces erase current and relaxes the junction requirements, enabling a smaller nonvolatile memory region area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If hot hole injection with band to band tunneling is used for erase operations, then data erasure can be achieved, but erase current consumption increases and power supply circuit area expands

Engineering Contradiction:
Improvedata erasure capabilityVSAvoiderase current consumption
Core Design Contradiction:
Loss of informationVSUse of energy by moving object

Solution Approach 1:

The patent changes the physical mechanism parameter from band-to-band tunneling to Fowler-Nordheim tunneling. This parameter change fundamentally alters the erase operation characteristics, enabling data erasure with significantly reduced current consumption while maintaining erase effectiveness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the hot hole injection mechanism with Fowler-Nordheim tunneling mechanism. This replacement eliminates the need for high current hot hole injection while achieving the same data erasure function through quantum tunneling effects, thereby reducing power consumption and circuit area.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Loss of information

If hot hole injection with band to band tunneling is used for erase operations, then data erasure can be achieved, but power supply circuit area increases

Engineering Contradiction:
Improvedata erasure capabilityVSAvoidpower supply circuit area
Core Design Contradiction:
Loss of informationVSArea of stationary object

Solution Approach 1:

By changing the erase mechanism parameter from band-to-band tunneling to Fowler-Nordhow tunneling, the patent reduces the power requirements for erase operations. This parameter change allows for smaller power supply circuits while maintaining effective data erasure capability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The substitution of hot hole injection with Fowler-Nordheim tunneling eliminates the need for high-power supply circuits required for hot hole generation and injection. This mechanism replacement directly reduces the power supply circuit area while preserving erase functionality.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If steep junctions are used to improve disturb resistance, then data retention improves, but manufacturing complexity increases

Engineering Contradiction:
Improvedisturb resistanceVSAvoidjunction formation complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the dependenc on steep junctions by implementing Fowler-Nordheim tunneling. This extraction removes the requirement for complex steep junction formation while maintaining disturb resistance through the alternative tunneling mechanism that is less sensitive to junction profile variations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By changing the erase mechanism to Fowler-Nordheim tunneling, the patent alters the sensitivity parameters of the memory cell. This parameter change reduces the critical dependence on steep junction profiles, thereby improving manufacturability while maintaining reliability.

Inventive Principle:
Principle #35Parameter changes

4Area of moving object

If memory cell area is reduced to lower bit cost, then production efficiency improves, but maintainin gsteep junctions becomes more difficult

Engineering Contradiction:
Improvememory cell areaVSAvoidsteep junction formation
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

The patent extracts the dependency on steep junctions by adopting Fowler-Nordheim tunneling for erase operations. This extraction allows memory cell scaling to smaller areas without the manufacturing complexity of forming steep junctions at reduced dimensions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By changing the erase mechanism parameter, the patent reduces the critical dimensions required for junction formation. This parameter change enables smaller memory cell areas while maintaining ease of manufacture through reduced sensitivity to junction profile requirements.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of Fowler-Nordheim tunneling significantly reduces erase current, allowing for a more compact memory design with improved disturb resistance and reduced power supply circuit area, while maintaining efficient data erasure.

Implementation Method 1

charges are injected into the charge trap film with Fowler-Nordheim tunneling by applying a proper potential to the portion with a locally changed physical shape

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS7915666B2Nonvolatile semiconductor memory devices with charge injection corner
Publication Date: 2011.03.29 RENESAS ELECTRONICS CORP
  • US7915666B2 patent drawing
  • US7915666B2 patent drawing
  • US7915666B2 patent drawing

AI summary

An erase method where a corner portion on which an electric field concentrates locally is provided on the memory gate electrode, and charges in the memory gate electrode are injected into a charge trap film in a gate dielectric with Fowler-Nordheim tunneling operation is used. Since current consumption at the time of erase can be reduced by the Fowler-Nordheim tunneling, a power supply circuit area of a memory module can be reduced. Since write disturb resistance can be improved, a memory array area can be reduced by adopting a simpler memory array configuration. Owing to both the effects, an area of the memory module can be largely reduced, so that manufacturing cost can be reduced. Further, since charge injection centers of write and erase coincide with each other, so that (program and erase) endurance is improved.